Lines Matching +full:0 +full:x2140
17 cpu@0 {
24 reg = <0x80000000 0xc600000>; /* 198 MB */
64 pinctrl-0 = <&button_pins>;
128 reg = <0x2d>;
134 #sound-dai-cells = <0>;
136 pinctrl-0 = <&mcbsp2_pins>;
144 #size-cells = <0>;
147 reg = <0x32>;
148 clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
151 multi-led@0 {
153 #size-cells = <0>;
154 reg = <0x0>;
157 led@0 {
160 reg = <0x0>;
167 reg = <0x1>;
174 reg = <0x6>;
180 #size-cells = <0>;
181 reg = <0x1>;
187 reg = <0x2>;
194 reg = <0x3>;
201 reg = <0x7>;
207 #size-cells = <0>;
208 reg = <0x2>;
214 reg = <0x4>;
221 reg = <0x5>;
228 reg = <0x8>;
236 #size-cells = <0>;
239 reg = <0x33>;
240 clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
242 multi-led@0 {
244 #size-cells = <0>;
245 reg = <0x0>;
248 led@0 {
251 reg = <0x0>;
258 reg = <0x1>;
265 reg = <0x6>;
271 #size-cells = <0>;
272 reg = <0x1>;
278 reg = <0x2>;
285 reg = <0x3>;
292 reg = <0x7>;
298 #size-cells = <0>;
299 reg = <0x2>;
305 reg = <0x4>;
312 reg = <0x5>;
319 reg = <0x8>;
327 #size-cells = <0>;
330 reg = <0x34>;
331 clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
333 multi-led@0 {
335 #size-cells = <0>;
336 reg = <0x0>;
339 led@0 {
342 reg = <0x0>;
349 reg = <0x1>;
356 reg = <0x6>;
362 #size-cells = <0>;
363 reg = <0x1>;
369 reg = <0x2>;
376 reg = <0x3>;
383 reg = <0x7>;
389 #size-cells = <0>;
390 reg = <0x2>;
396 reg = <0x4>;
403 reg = <0x5>;
410 reg = <0x8>;
418 #size-cells = <0>;
421 reg = <0x35>;
422 clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
424 multi-led@0 {
426 #size-cells = <0>;
427 reg = <0x0>;
430 led@0 {
433 reg = <0x0>;
440 reg = <0x1>;
447 reg = <0x6>;
453 #size-cells = <0>;
454 reg = <0x1>;
460 reg = <0x2>;
467 reg = <0x3>;
474 reg = <0x7>;
480 #size-cells = <0>;
481 reg = <0x2>;
487 reg = <0x4>;
494 reg = <0x5>;
501 reg = <0x8>;
512 #sound-dai-cells = <0>;
514 reg = <0x18>;
529 …OMAP3_CORE1_IOPAD(0x21e0, PIN_INPUT_PULLUP | PIN_OFF_INPUT_PULLUP | PIN_OFF_OUTPUT_LOW | PIN_OFF_W…
535 OMAP3_CORE1_IOPAD(0x20dc, PIN_INPUT | MUX_MODE4) /* dss_data0.gpio_70 */
536 OMAP3_CORE1_IOPAD(0x20e0, PIN_INPUT | MUX_MODE4) /* dss_data2.gpio_72 */
537 OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE4) /* dss_data4.gpio_74 */
538 OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* dss_data15.gpio_85 */
539 OMAP3_CORE1_IOPAD(0x2a1a, PIN_OUTPUT | MUX_MODE0) /* sys_clkout1.sys_clkout1 */
545 OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
546 OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
547 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
548 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
549 OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
550 OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
556 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
557 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
558 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
559 OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
560 OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
561 OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
562 OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat4.sdmmc2_dat4 */
563 OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat5.sdmmc2_dat5 */
564 OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat6.sdmmc2_dat6 */
565 OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat7.sdmmc2_dat7 */
571 OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_fsx */
572 OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx.mcbsp2_clkx */
573 OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr.mcbsp2.dr */
574 OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx.mcbsp2_dx */
582 OMAP3630_CORE2_IOPAD(0x25d8, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_clk.sdmmc3_clk */
583 OMAP3630_CORE2_IOPAD(0x25da, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_ctl.sdmmc3_cmd */
584 OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d3.sdmmc3_dat3 */
585 OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d4.sdmmc3_dat0 */
586 OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d5.sdmmc3_dat1 */
587 OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d6.sdmmc3_dat2 */
596 pinctrl-0 = <&mmc1_pins>;
604 pinctrl-0 = <&mmc2_pins>;
610 #size-cells = <0>;
614 pinctrl-0 = <&mmc3_pins>;
620 atheros@0 {
622 reg = <0>;
629 pinctrl-0 = <&tps_pins>;