Lines Matching +full:0 +full:x1c4
15 reg = <0x80000000 0x3fd00000>; /* 1021 MB */
21 pinctrl-0 = <&poweroff_gpio>;
28 pinctrl-0 = <&hdmi_hpd_gpio>;
118 pinctrl-0 = <&dss_hdmi_pins>;
125 lanes = <1 0 3 2 5 4 7 6>;
133 reg = <0x48>;
134 pinctrl-0 = <&tmp105_irq>;
138 &omap4_pmx_core 0x14e>;
158 pinctrl-0 = <&mmc3_pins>;
162 &omap4_pmx_core 0xde>;
170 #size-cells = <0>;
176 <&omap4_pmx_core 0x4e>;
188 OMAP4_IOPAD(0x098, PIN_INPUT | MUX_MODE3)
195 OMAP4_IOPAD(0x09a, PIN_INPUT | MUX_MODE0)
196 OMAP4_IOPAD(0x09c, PIN_INPUT | MUX_MODE0)
197 OMAP4_IOPAD(0x09e, PIN_INPUT | MUX_MODE0)
209 /* 0x4a10008e gpmc_wait2.gpio_100 d23 */
210 OMAP4_IOPAD(0x08e, PIN_INPUT | MUX_MODE3)
212 /* 0x4a100102 abe_mcbsp1_dx.sdmmc3_dat2 ab25 */
213 OMAP4_IOPAD(0x102, PIN_INPUT_PULLUP | MUX_MODE1)
215 /* 0x4a100104 abe_mcbsp1_fsx.sdmmc3_dat3 ac27 */
216 OMAP4_IOPAD(0x104, PIN_INPUT_PULLUP | MUX_MODE1)
218 /* 0x4a100118 uart2_cts.sdmmc3_clk ab26 */
219 OMAP4_IOPAD(0x118, PIN_INPUT | MUX_MODE1)
221 /* 0x4a10011a uart2_rts.sdmmc3_cmd ab27 */
222 OMAP4_IOPAD(0x11a, PIN_INPUT_PULLUP | MUX_MODE1)
224 /* 0x4a10011c uart2_rx.sdmmc3_dat0 aa25 */
225 OMAP4_IOPAD(0x11c, PIN_INPUT_PULLUP | MUX_MODE1)
227 /* 0x4a10011e uart2_tx.sdmmc3_dat1 aa26 */
228 OMAP4_IOPAD(0x11e, PIN_INPUT_PULLUP | MUX_MODE1)
235 OMAP4_IOPAD(0x074, PIN_OUTPUT_PULLUP | MUX_MODE3)
242 OMAP4_IOPAD(0x18e, PIN_INPUT_PULLUP | MUX_MODE3)
249 OMAP4_IOPAD(0x088, PIN_OUTPUT | MUX_MODE3)
255 OMAP4_IOPAD(0x196, MUX_MODE7)
256 OMAP4_IOPAD(0x198, MUX_MODE7)
257 OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE0)
258 OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE0)
259 OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE0)
260 OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE0)
261 OMAP4_IOPAD(0x1ba, PIN_INPUT_PULLUP | MUX_MODE0)
262 OMAP4_IOPAD(0x1bc, PIN_INPUT_PULLUP | MUX_MODE0)
263 OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE0)
264 OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE0)
265 OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE0)
266 OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE0)
267 OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE0)
268 OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE0)
275 OMAP4_IOPAD(0x196, PIN_INPUT | MUX_MODE0)
276 OMAP4_IOPAD(0x198, PIN_INPUT | MUX_MODE0)
277 OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE7)
278 OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE7)
279 OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE7)
280 OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE7)
281 OMAP4_IOPAD(0x1ba, PIN_INPUT_PULLUP | MUX_MODE7)
282 OMAP4_IOPAD(0x1bc, PIN_INPUT_PULLUP | MUX_MODE7)
283 OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE7)
284 OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE7)
285 OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE7)
286 OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE7)
287 OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE7)
288 OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE7)
300 /* 0x4a10013c mcspi1_cs2.uart1_cts ag23 */
301 OMAP4_IOPAD(0x13c, PIN_INPUT_PULLUP | MUX_MODE1)
303 /* 0x4a10013e mcspi1_cs3.uart1_rts ah23 */
304 OMAP4_IOPAD(0x13e, MUX_MODE1)
306 /* 0x4a100140 uart3_cts_rctx.uart1_tx f27 */
307 OMAP4_IOPAD(0x140, PIN_OUTPUT | MUX_MODE1)
309 /* 0x4a1001ca dpm_emu14.uart1_rx aa3 */
310 OMAP4_IOPAD(0x1ca, PIN_INPUT_PULLUP | MUX_MODE2)
317 OMAP4_IOPAD(0x196, MUX_MODE7)
318 OMAP4_IOPAD(0x198, MUX_MODE7)
319 OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE7)
320 OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE7)
321 OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE7)
322 OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE7)
323 OMAP4_IOPAD(0x1ba, MUX_MODE2)
324 OMAP4_IOPAD(0x1bc, PIN_INPUT | MUX_MODE2)
325 OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE7)
326 OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE7)
327 OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE7)
328 OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE7)
329 OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE7)
330 OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE7)
336 OMAP4_IOPAD(0x15c, PIN_INPUT | MUX_MODE0) /* uart4_rx */
337 OMAP4_IOPAD(0x15e, PIN_OUTPUT | MUX_MODE0) /* uart4_tx */
338 OMAP4_IOPAD(0x110, PIN_INPUT_PULLUP | MUX_MODE5) /* uart4_cts */
339 OMAP4_IOPAD(0x112, PIN_OUTPUT_PULLUP | MUX_MODE5) /* uart4_rts */
345 OMAP4_IOPAD(0x0f6, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_clkx */
346 OMAP4_IOPAD(0x0f8, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_dr */
347 OMAP4_IOPAD(0x0fa, PIN_OUTPUT | MUX_MODE0) /* abe_mcbsp2_dx */
348 OMAP4_IOPAD(0x0fc, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_fsx */
354 OMAP4_IOPAD(0x106, PIN_INPUT | MUX_MODE1) /* abe_mcbsp3_dr */
355 OMAP4_IOPAD(0x108, PIN_OUTPUT | MUX_MODE1) /* abe_mcbsp3_dx */
356 OMAP4_IOPAD(0x10a, PIN_INPUT | MUX_MODE1) /* abe_mcbsp3_clkx */
357 OMAP4_IOPAD(0x10c, PIN_INPUT | MUX_MODE1) /* abe_mcbsp3_fsx */
366 OMAP4_IOPAD(0x040, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
384 pinctrl-0 = <&uart1_pins>;
386 &omap4_pmx_core 0x110>;
393 &omap4_pmx_core 0x17c>;
399 pinctrl-0 = <&uart4_pins>;
421 #sound-dai-cells = <0>;
423 pinctrl-0 = <&mcbsp2_pins>;
437 #sound-dai-cells = <0>;
439 pinctrl-0 = <&mcbsp3_pins>;