ti/omap/am3517.dtsi

1 // SPDX-License-Identifier: GPL-2.0-only
5  * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
11 /delete-node/ &aes1_target;
12 /delete-node/ &aes2_target;
24 			operating-points-v2 = <&cpu0_opp_table>;
26 			clock-latency = <300000>; /* From legacy driver */
30 	cpu0_opp_table: opp-table {
31 		compatible = "operating-points-v2-ti-cpu";
38 		opp-50-300000000 {
40 			opp-hz = /bits/ 64 <300000000>;
41 			opp-microvolt = <1200000>;
42 			opp-supported-hw = <0xffffffff 0xffffffff>;
43 			opp-suspend;
46 		opp-100-600000000 {
48 			opp-hz = /bits/ 64 <600000000>;
49 			opp-microvolt = <1200000>;
50 			opp-supported-hw = <0xffffffff 0xffffffff>;
55 		target-module@5c040000 {
56 			compatible = "ti,sysc-omap2", "ti,sysc";
60 			reg-names = "rev", "sysc", "syss";
61 			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
64 			ti,sysc-midle = <SYSC_IDLE_FORCE>,
67 			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
70 			ti,syss-mask = <1>;
72 			clock-names = "fck";
73 			#address-cells = <1>;
74 			#size-cells = <1>;
78 				compatible = "ti,omap3-musb";
82 				interrupt-names = "mc";
87 			compatible = "ti,am3517-emac";
93 			ti,davinci-ctrl-reg-offset = <0x10000>;
94 			ti,davinci-ctrl-mod-reg-offset = <0>;
95 			ti,davinci-ctrl-ram-offset = <0x20000>;
96 			ti,davinci-ctrl-ram-size = <0x2000>;
97 			ti,davinci-rmii-en = /bits/ 8 <1>;
98 			local-mac-address = [ 00 00 00 00 00 00 ];
100 			clock-names = "ick";
109 			#address-cells = <1>;
110 			#size-cells = <0>;
112 			clock-names = "fck";
116 			compatible = "ti,omap3-uart";
122 			dma-names = "tx", "rx";
123 			clock-frequency = <48000000>;
127 			compatible = "ti,omap3-padconf", "pinctrl-single";
129 			#address-cells = <1>;
130 			#size-cells = <0>;
131 			#pinctrl-cells = <1>;
132 			#interrupt-cells = <1>;
133 			interrupt-controller;
134 			pinctrl-single,register-width = <16>;
135 			pinctrl-single,function-mask = <0xff1f>;
139 			compatible = "ti,am3517-hecc";
144 			reg-names = "hecc", "hecc-ram", "mbx";
153 		 * write-only at 0x50000e10. We detect SGX based on the SGX
157 		sgx_module: target-module@50000000 {
158 			compatible = "ti,sysc-omap2", "ti,sysc";
160 			reg-names = "rev";
162 			clock-names = "fck", "ick";
163 			#address-cells = <1>;
164 			#size-cells = <1>;
168 				compatible = "ti,omap3430-gpu", "img,powervr-sgx530";
179 	/delete-property/ clocks;
182 /* Table Table 5-79 of the TRM shows 480ab000 is reserved */
199 #include "am35xx-clocks.dtsi"
200 #include "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"
202 /* Preferred always-on timer for clocksource */
204 	ti,no-reset-on-init;
205 	ti,no-idle;
207 		assigned-clocks = <&gpt1_fck>;
208 		assigned-clock-parents = <&sys_ck>;
214 	ti,no-reset-on-init;
215 	ti,no-idle;
217 		assigned-clocks = <&gpt2_fck>;
218 		assigned-clock-parents = <&sys_ck>;