Lines Matching +full:0 +full:x11800000
16 reg = <0xc0000000 0x0>;
21 #size-cells = <0>;
23 cpu: cpu@0 {
26 reg = <0>;
78 reg = <0xfffee000 0x2000>;
84 #clock-cells = <0>;
89 #clock-cells = <0>;
95 #clock-cells = <0>;
102 reg = <0x11800000 0x40000>,
103 <0x11e00000 0x8000>,
104 <0x11f00000 0x8000>,
105 <0x01c14044 0x4>,
106 <0x01c14174 0x8>;
119 ranges = <0x0 0x01c00000 0x400000>;
124 reg = <0x10000 0x1000>;
137 reg = <0x11000 0x1000>;
142 #clock-cells = <0>;
148 #clock-cells = <0>;
151 #clock-cells = <0>;
156 reg = <0x14120 0x50>;
160 pinctrl-single,function-mask = <0xf>;
162 pinctrl-single,gpio-range = <&range 0 17 0x8>,
163 <&range 17 8 0x4>,
164 <&range 26 8 0x4>,
165 <&range 34 80 0x8>,
166 <&range 129 31 0x8>;
176 0x0c 0x22000000 0xff000000
182 0x0c 0x00220000 0x00ff0000
188 0x00 0x00440000 0x00ff0000
194 0x10 0x22000000 0xff000000
200 0x00 0x44000000 0xff000000
206 0x10 0x00220000 0x00ff0000
212 0x10 0x00002200 0x0000ff00
218 0x10 0x00440000 0x00ff0000
224 * MMCSD0_DAT[1] MMCSD0_DAT[0]
227 0x28 0x00222222 0x00ffffff
233 0xc 0x00000002 0x0000000f
239 0xc 0x00000020 0x000000f0
245 0x14 0x00000002 0x0000000f
251 0x14 0x00000020 0x000000f0
257 0x8 0x20000000 0xf0000000
263 0x4 0x40000000 0xf0000000
269 0x4 0x00000004 0x0000000f
275 0xc 0x00001101 0x0000ff0f
281 0x10 0x00000010 0x000000f0
287 0xc 0x01000000 0x0f000000
293 0x14 0x00110100 0x00ff0f00
299 0x14 0x00000010 0x000000f0
305 0x10 0x00000088 0x000000ff
315 0x8 0x88888880 0xfffffff0
321 0xc 0x88888888 0xffffffff
330 0x40 0x22222200 0xffffff00
333 * LCD_D[14], LCD_D[15], LCD_D[0], LCD_D[1]
335 0x44 0x22222222 0xffffffff
337 0x48 0x00000022 0x000000ff
340 0x48 0x02000000 0x0f000000
342 0x4c 0x02000022 0x0f0000ff
348 0x38 0x11111111 0xffffffff
349 /* VP_DIN[10..15,0..1] */
350 0x3c 0x11111111 0xffffffff
352 0x40 0x00000011 0x000000ff
358 0x40 0x11111100 0xffffff00
359 /* VP_DOUT[10..15,0..1] */
360 0x44 0x11111111 0xffffffff
362 0x48 0x00000011 0x000000ff
367 0x4c 0x00111100 0x00ffff00
373 reg = <0x14110 0x0c>;
378 reg = <0x1417c 0x14>;
383 clocks = <&usb_phy_clk 0>, <&usb_phy_clk 1>;
396 #clock-cells = <0>;
402 #clock-cells = <0>;
408 #clock-cells = <0>;
414 #clock-cells = <0>;
419 edma0: edma@0 {
421 /* eDMA3 CC0: 0x01c0 0000 - 0x01c0 7fff */
422 reg = <0x0 0x8000>;
428 ti,tptcs = <&edma0_tptc0 7>, <&edma0_tptc1 0>;
429 power-domains = <&psc0 0>;
433 reg = <0x8000 0x400>;
440 reg = <0x8400 0x400>;
447 /* eDMA3 CC1: 0x01e3 0000 - 0x01e3 7fff */
448 reg = <0x230000 0x8000>;
455 power-domains = <&psc1 0>;
459 reg = <0x238000 0x400>;
466 reg = <0x42000 0x100>;
476 reg = <0x10c000 0x100>;
486 reg = <0x10d000 0x100>;
496 reg = <0x23000 0x1000>;
504 reg = <0x22000 0x1000>;
507 #size-cells = <0>;
513 reg = <0x228000 0x1000>;
516 #size-cells = <0>;
523 reg = <0x20000 0x1000>;
530 reg = <0x21000 0x1000>;
536 reg = <0x40000 0x1000>;
540 dmas = <&edma0 16 0>, <&edma0 17 0>;
547 reg = <0x217000 0x1000>;
553 port@0 {
555 #size-cells = <0>;
561 #size-cells = <0>;
566 reg = <0x21b000 0x1000>;
570 dmas = <&edma1 28 0>, <&edma1 29 0>;
578 reg = <0x300000 0x2000>;
587 reg = <0x302000 0x2000>;
596 reg = <0x306000 0x80>;
605 reg = <0x307000 0x80>;
614 reg = <0x308000 0x80>;
622 #size-cells = <0>;
624 reg = <0x41000 0x1000>;
628 dmas = <&edma0 14 0>, <&edma0 15 0>;
636 #size-cells = <0>;
638 reg = <0x30e000 0x1000>;
642 dmas = <&edma0 18 0>, <&edma0 19 0>;
650 reg = <0x200000 0x1000>;
655 phys = <&usb_phy 0>;
664 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
665 &cppi41dma 2 0 &cppi41dma 3 0
666 &cppi41dma 0 1 &cppi41dma 1 1
674 reg = <0x201000 0x1000
675 0x202000 0x1000
676 0x204000 0x4000>;
690 reg = <0x218000 0x2000>, <0x22c018 0x4>;
698 reg = <0x21a000 0x1000>;
706 #clock-cells = <0>;
712 #size-cells = <0>;
713 reg = <0x224000 0x1000>;
721 reg = <0x220000 0x4000>;
722 ti,davinci-ctrl-reg-offset = <0x3000>;
723 ti,davinci-ctrl-mod-reg-offset = <0x2000>;
724 ti,davinci-ctrl-ram-offset = <0>;
725 ti,davinci-ctrl-ram-size = <0x2000>;
734 reg = <0x225000 0x1000>;
745 reg = <0x226000 0x1000>;
748 ti,davinci-gpio-unbanked = <0>;
754 gpio-ranges = <&pmx_core 0 15 1>,
769 <&pmx_core 15 0 1>,
901 reg = <0x227000 0x1000>;
912 reg = <0x22c00c 0x8>;
918 reg = <0x100000 0x2000>,
919 <0x102000 0x400000>;
926 <&edma0 0 1>;
932 reg = <0x213000 0x1000>;
946 reg = <0x68000000 0x00008000>;
947 ranges = <0 0 0x60000000 0x08000000
948 1 0 0x68000000 0x00008000>;
956 reg = <0xb0000000 0xe8>;