Lines Matching full:rcc

45 #include <dt-bindings/mfd/stm32h7-rcc.h>
77 clocks = <&rcc TIM5_CK>;
85 clocks = <&rcc LPTIM1_CK>;
113 resets = <&rcc STM32H7_APB1L_RESET(SPI2)>;
114 clocks = <&rcc SPI2_CK>;
125 resets = <&rcc STM32H7_APB1L_RESET(SPI3)>;
126 clocks = <&rcc SPI3_CK>;
135 clocks = <&rcc USART2_CK>;
143 clocks = <&rcc USART3_CK>;
151 clocks = <&rcc UART4_CK>;
161 resets = <&rcc STM32H7_APB1L_RESET(I2C1)>;
162 clocks = <&rcc I2C1_CK>;
173 resets = <&rcc STM32H7_APB1L_RESET(I2C2)>;
174 clocks = <&rcc I2C2_CK>;
185 resets = <&rcc STM32H7_APB1L_RESET(I2C3)>;
186 clocks = <&rcc I2C3_CK>;
193 clocks = <&rcc DAC12_CK>;
219 clocks = <&rcc USART1_CK>;
228 resets = <&rcc STM32H7_APB2_RESET(SPI1)>;
229 clocks = <&rcc SPI1_CK>;
239 resets = <&rcc STM32H7_APB2_RESET(SPI4)>;
240 clocks = <&rcc SPI4_CK>;
250 resets = <&rcc STM32H7_APB2_RESET(SPI5)>;
251 clocks = <&rcc SPI5_CK>;
266 clocks = <&rcc DMA1_CK>;
284 clocks = <&rcc DMA2_CK>;
298 clocks = <&rcc DMA1_CK>;
305 clocks = <&rcc ADC12_CK>;
336 clocks = <&rcc USB1OTG_CK>;
348 clocks = <&rcc USB2OTG_CK>;
357 resets = <&rcc STM32H7_APB3_RESET(LTDC)>;
358 clocks = <&rcc LTDC_CK>;
367 clocks = <&rcc MDMA_CK>;
378 clocks = <&rcc SDMMC1_CK>;
380 resets = <&rcc STM32H7_AHB3_RESET(SDMMC1)>;
391 clocks = <&rcc SDMMC2_CK>;
393 resets = <&rcc STM32H7_AHB2_RESET(SDMMC2)>;
419 resets = <&rcc STM32H7_APB4_RESET(SPI6)>;
420 clocks = <&rcc SPI6_CK>;
431 resets = <&rcc STM32H7_APB4_RESET(I2C4)>;
432 clocks = <&rcc I2C4_CK>;
441 clocks = <&rcc LPTIM2_CK>;
468 clocks = <&rcc LPTIM3_CK>;
488 clocks = <&rcc LPTIM4_CK>;
502 clocks = <&rcc LPTIM5_CK>;
516 clocks = <&rcc VREF_CK>;
525 clocks = <&rcc RTCAPB_CK>, <&rcc RTC_CK>;
527 assigned-clocks = <&rcc RTC_CK>;
528 assigned-clock-parents = <&rcc LSE_CK>;
535 rcc: reset-clock-controller@58024400 { label
536 compatible = "st,stm32h743-rcc", "st,stm32-rcc";
553 clocks = <&rcc ADC3_CK>;
578 clocks = <&rcc ETH1MAC_CK>, <&rcc ETH1TX_CK>, <&rcc ETH1RX_CK>;
596 clocks = <&rcc GPIOA_CK>;
608 clocks = <&rcc GPIOB_CK>;
620 clocks = <&rcc GPIOC_CK>;
632 clocks = <&rcc GPIOD_CK>;
644 clocks = <&rcc GPIOE_CK>;
656 clocks = <&rcc GPIOF_CK>;
668 clocks = <&rcc GPIOG_CK>;
680 clocks = <&rcc GPIOH_CK>;
692 clocks = <&rcc GPIOI_CK>;
704 clocks = <&rcc GPIOJ_CK>;
716 clocks = <&rcc GPIOK_CK>;