dts/st/stm32h7-pinctrl.dtsi

2  * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4  * This file is dual-licensed: you can use it either under the terms
6  * licensing only applies to this file, and not this project as a
9  *  a) This file is free software; you can redistribute it and/or
16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
22  *     obtaining a copy of this software and associated documentation
35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
43 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
47 	i2c1_pins_a: i2c1-0 {
51 			bias-disable;
52 			drive-open-drain;
53 			slew-rate = <0>;
57 	ethernet_rmii: rmii-0 {
64 				 <STM32_PINMUX('A', 7, AF11)>,
66 				 <STM32_PINMUX('A', 2, AF11)>,
67 				 <STM32_PINMUX('A', 1, AF11)>;
68 			slew-rate = <2>;
72 	sdmmc1_b4_pins_a: sdmmc1-b4-0 {
75 				 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
79 				 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
80 			slew-rate = <3>;
81 			drive-push-pull;
82 			bias-disable;
86 	sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
89 				 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
93 			slew-rate = <3>;
94 			drive-push-pull;
95 			bias-disable;
98 			pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
99 			slew-rate = <3>;
100 			drive-open-drain;
101 			bias-disable;
105 	sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
108 				 <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
112 				 <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
116 	sdmmc1_dir_pins_a: sdmmc1-dir-0 {
120 				 <STM32_PINMUX('B', 9, AF7)>; /* SDMMC1_CDIR */
121 			slew-rate = <3>;
122 			drive-push-pull;
123 			bias-pull-up;
127 			bias-pull-up;
131 	sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 {
135 				 <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
140 	sdmmc2_b4_pins_a: sdmmc2-b4-0 {
146 				 <STM32_PINMUX('D', 6, AF11)>, /* SDMMC1_CK */
147 				 <STM32_PINMUX('D', 7, AF11)>; /* SDMMC1_CMD */
148 			slew-rate = <3>;
149 			drive-push-pull;
150 			bias-disable;
154 	sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
160 				 <STM32_PINMUX('D', 6, AF11)>; /* SDMMC1_CK */
161 			slew-rate = <3>;
162 			drive-push-pull;
163 			bias-disable;
166 			pinmux = <STM32_PINMUX('D', 7, AF11)>; /* SDMMC1_CMD */
167 			slew-rate = <3>;
168 			drive-open-drain;
169 			bias-disable;
173 	sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
179 				 <STM32_PINMUX('D', 6, ANALOG)>, /* SDMMC1_CK */
180 				 <STM32_PINMUX('D', 7, ANALOG)>; /* SDMMC1_CMD */
184 	spi1_pins: spi1-0 {
186 			pinmux = <STM32_PINMUX('A', 5, AF5)>,
190 			bias-disable;
191 			drive-push-pull;
192 			slew-rate = <2>;
195 			pinmux = <STM32_PINMUX('G', 9, AF5)>;
197 			bias-disable;
201 	uart4_pins: uart4-0 {
203 			pinmux = <STM32_PINMUX('A', 0, AF8)>; /* UART4_TX */
204 			bias-disable;
205 			drive-push-pull;
206 			slew-rate = <0>;
209 			pinmux = <STM32_PINMUX('I', 9, AF8)>; /* UART4_RX */
210 			bias-disable;
214 	usart1_pins: usart1-0 {
217 			bias-disable;
218 			drive-push-pull;
219 			slew-rate = <0>;
223 			bias-disable;
227 	usart2_pins: usart2-0 {
229 			pinmux = <STM32_PINMUX('D', 5, AF7)>; /* USART2_TX */
230 			bias-disable;
231 			drive-push-pull;
232 			slew-rate = <0>;
235 			pinmux = <STM32_PINMUX('D', 6, AF7)>; /* USART2_RX */
236 			bias-disable;
240 	usart3_pins: usart3-0 {
243 				 <STM32_PINMUX('D', 12, AF7)>; /* USART3_RTS_DE */
244 			bias-disable;
245 			drive-push-pull;
246 			slew-rate = <0>;
250 				 <STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */
251 			bias-disable;
255 	usbotg_hs_pins_a: usbotg-hs-0 {
259 					 <STM32_PINMUX('C', 0, AF10)>,	/* ULPI_STP> */
260 					 <STM32_PINMUX('A', 5, AF10)>,	/* ULPI_CK> */
261 					 <STM32_PINMUX('A', 3, AF10)>,	/* ULPI_D0> */
262 					 <STM32_PINMUX('B', 0, AF10)>,	/* ULPI_D1> */
269 			bias-disable;
270 			drive-push-pull;
271 			slew-rate = <2>;