Lines Matching +full:0 +full:x110

22 			reg = <0x45000000 0x00400000>;
28 reg = <0x44000000 0x01000000>;
35 #size-cells = <0>;
36 cpu0: cpu@0 {
39 reg = <0>;
41 /* u-boot puts hpen in SBC dmem at 0xa4 offset */
42 cpu-release-addr = <0x94100A4>;
45 operating-points = <1500000 0
46 1200000 0
47 800000 0
48 500000 0>;
54 st,syscfg = <&syscfg_core 0x8e0>;
62 /* u-boot puts hpen in SBC dmem at 0xa4 offset */
63 cpu-release-addr = <0x94100A4>;
66 operating-points = <1500000 0
67 1200000 0
68 800000 0
69 500000 0>;
78 reg = <0x08761000 0x1000>, <0x08760100 0x100>;
83 reg = <0x08760000 0x1000>;
89 reg = <0x08760200 0x100>;
96 reg = <0x08762000 0x1000>;
151 #phy-cells = <0>;
152 st,syscfg = <&syscfg_core 0x100 0xf4>;
166 reg = <0x9b22000 0xff>,
167 <0x9b09000 0xff>,
168 <0x9b04000 0xff>;
173 st,syscfg = <0x114 0x818 0xe0 0xec>;
181 reg = <0x9b2a000 0xff>,
182 <0x9b19000 0xff>,
183 <0x9b14000 0xff>;
188 st,syscfg = <0x118 0x81c 0xe4 0xf0>;
197 reg = <0x8f95000 0xff>,
198 <0x8f90000 0xff>;
202 st,syscfg = <0x11c 0x820>;
218 st,syscfg = <&syscfg_core 0x22c>;
221 mboxes = <&mailbox0 0 2>, <&mailbox2 0 1>, <&mailbox0 0 3>, <&mailbox2 0 0>;
231 st,syscfg = <&syscfg_core 0x224>;
234 mboxes = <&mailbox0 0 0>, <&mailbox3 0 1>, <&mailbox0 0 1>, <&mailbox3 0 0>;
256 reg = <0x9620000 0x1000>;
261 reg = <0x9280000 0x1000>;
266 reg = <0x9290000 0x1000>;
271 reg = <0x92a0000 0x1000>;
276 reg = <0x9600000 0x1000>;
281 reg = <0x92b0000 0x1000>;
293 reg = <0x94b5100 0x1000>;
299 reg = <0x8d02800 0x200>;
305 reg = <0x8d00200 0x100>;
311 reg = <0x9830000 0x2c>;
321 reg = <0x9831000 0x2c>;
324 pinctrl-0 = <&pinctrl_serial1>;
332 reg = <0x9832000 0x2c>;
335 pinctrl-0 = <&pinctrl_serial2>;
344 reg = <0x9530000 0x2c>;
347 pinctrl-0 = <&pinctrl_sbc_serial0>;
355 reg = <0x9531000 0x2c>;
358 pinctrl-0 = <&pinctrl_sbc_serial1>;
367 reg = <0x9840000 0x110>;
372 pinctrl-0 = <&pinctrl_i2c0_default>;
374 #size-cells = <0>;
381 reg = <0x9841000 0x110>;
387 pinctrl-0 = <&pinctrl_i2c1_default>;
389 #size-cells = <0>;
396 reg = <0x9842000 0x110>;
402 pinctrl-0 = <&pinctrl_i2c2_default>;
404 #size-cells = <0>;
411 reg = <0x9843000 0x110>;
417 pinctrl-0 = <&pinctrl_i2c3_default>;
419 #size-cells = <0>;
426 reg = <0x9844000 0x110>;
432 pinctrl-0 = <&pinctrl_i2c4_default>;
434 #size-cells = <0>;
441 reg = <0x9845000 0x110>;
447 pinctrl-0 = <&pinctrl_i2c5_default>;
449 #size-cells = <0>;
458 reg = <0x9540000 0x110>;
464 pinctrl-0 = <&pinctrl_i2c10_default>;
466 #size-cells = <0>;
473 reg = <0x9541000 0x110>;
479 pinctrl-0 = <&pinctrl_i2c11_default>;
481 #size-cells = <0>;
488 reg = <0x9840000 0x110>;
492 pinctrl-0 = <&pinctrl_spi0_default>;
495 #size-cells = <0>;
502 reg = <0x9841000 0x110>;
507 pinctrl-0 = <&pinctrl_spi1_default>;
509 #size-cells = <0>;
516 reg = <0x9842000 0x110>;
521 pinctrl-0 = <&pinctrl_spi2_default>;
523 #size-cells = <0>;
530 reg = <0x9843000 0x110>;
535 pinctrl-0 = <&pinctrl_spi3_default>;
537 #size-cells = <0>;
544 reg = <0x9844000 0x110>;
549 pinctrl-0 = <&pinctrl_spi4_default>;
551 #size-cells = <0>;
559 reg = <0x9540000 0x110>;
564 pinctrl-0 = <&pinctrl_spi10_default>;
566 #size-cells = <0>;
573 reg = <0x9541000 0x110>;
578 pinctrl-0 = <&pinctrl_spi11_default>;
580 #size-cells = <0>;
587 reg = <0x9542000 0x110>;
592 pinctrl-0 = <&pinctrl_spi12_default>;
594 #size-cells = <0>;
602 reg = <0x09060000 0x7ff>, <0x9061008 0x20>;
607 pinctrl-0 = <&pinctrl_mmc0>;
617 reg = <0x09080000 0x7ff>;
622 pinctrl-0 = <&pinctrl_sd1>;
633 reg = <0x8787000 0x1000>;
643 reg = <0x8788000 0x1000>;
651 reg = <0x9022000 0x1000>;
656 pinctrl-0 = <&pinctrl_fsm>;
658 st,boot-device-reg = <0x8c4>;
659 st,boot-device-spi = <0x68>;
666 reg = <0x9b20000 0x1000>;
682 ports-implemented = <0x1>;
689 reg = <0x9b28000 0x1000>;
707 ports-implemented = <0x1>;
715 reg = <0x08f94000 0x1000>, <0x110 0x4>;
724 pinctrl-0 = <&pinctrl_usb3>;
731 reg = <0x09900000 0x100000>;
745 reg = <0x9810000 0x68>;
748 pinctrl-0 = <&pinctrl_pwm0_chan0_default>;
760 reg = <0x9510000 0x68>;
763 pinctrl-0 = <&pinctrl_pwm1_chan0_default
776 reg = <0x08a89000 0x1000>;
783 reg = <0x08a8a000 0x1000>;
792 reg = <0x9630000 0x8000>, <0x80 0x4>;
795 st,syscon = <&syscfg_sbc_reg 0x80>;
808 pinctrl-0 = <&pinctrl_rgmii1>;
817 reg = <0x8f00000 0x1000>;
826 reg = <0x8f01000 0x1000>;
834 reg = <0x8f02000 0x1000>;
842 reg = <0x8f03000 0x1000>;
851 reg = <0x8e20000 0x8000>,
852 <0x8e30000 0x3000>,
853 <0x8e37000 0x1000>,
854 <0x8e38000 0x8000>;
868 reg = <0x8e40000 0x8000>,
869 <0x8e50000 0x3000>,
870 <0x8e57000 0x1000>,
871 <0x8e58000 0x8000>;
888 reg = <0x8e60000 0x8000>,
889 <0x8e70000 0x3000>,
890 <0x8e77000 0x1000>,
891 <0x8e78000 0x8000>;
906 #sound-dai-cells = <0>;
909 assigned-clocks = <&clk_s_d0_quadfs 0>, <&clk_s_d0_flexgen CLK_PCM_0>;
910 assigned-clock-parents = <0>, <&clk_s_d0_quadfs 0>;
912 reg = <0x8d80000 0x158>;
914 dmas = <&fdma0 2 0 1>;
922 #sound-dai-cells = <0>;
926 assigned-clock-parents = <0>, <&clk_s_d0_quadfs 1>;
928 reg = <0x8d81000 0x158>;
930 dmas = <&fdma0 3 0 1>;
938 #sound-dai-cells = <0>;
942 assigned-clock-parents = <0>, <&clk_s_d0_quadfs 2>;
944 reg = <0x8d82000 0x158>;
946 dmas = <&fdma0 4 0 1>;
954 #sound-dai-cells = <0>;
958 assigned-clock-parents = <0>, <&clk_s_d0_quadfs 3>;
960 reg = <0x8d85000 0x158>;
962 dmas = <&fdma0 7 0 1>;
970 #sound-dai-cells = <0>;
972 reg = <0x8d83000 0x158>;
974 dmas = <&fdma0 5 0 1>;
982 #sound-dai-cells = <0>;
984 reg = <0x8d84000 0x158>;
986 dmas = <&fdma0 6 0 1>;