dts/st/spear310.dtsi

1 // SPDX-License-Identifier: GPL-2.0-or-later
12 		#address-cells = <1>;
13 		#size-cells = <1>;
14 		compatible = "simple-bus";
20 			compatible = "st,spear310-pinmux";
22 			#gpio-range-cells = <3>;
26 			compatible = "st,spear600-fsmc-nand";
27 			#address-cells = <1>;
28 			#size-cells = <1>;
30 			       0x40000000 0x0010	/* NAND Base DATA */
31 			       0x40020000 0x0010	/* NAND Base ADDR */
32 			       0x40010000 0x0010>;	/* NAND Base CMD */
33 			reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
37 		shirq: interrupt-controller@b4000000 {
38 			compatible = "st,spear310-shirq";
41 			#interrupt-cells = <1>;
42 			interrupt-controller;
46 			#address-cells = <1>;
47 			#size-cells = <1>;
48 			compatible = "simple-bus";
56 				interrupt-parent = <&shirq>;
64 				interrupt-parent = <&shirq>;
72 				interrupt-parent = <&shirq>;
80 				interrupt-parent = <&shirq>;
88 				interrupt-parent = <&shirq>;
93 				compatible = "st,spear-plgpio";
96 				#interrupt-cells = <1>;
97 				interrupt-controller;
98 				gpio-controller;
99 				#gpio-cells = <2>;
100 				gpio-ranges = <&pinmux 0 0 102>;
103 				st-plgpio,ngpio = <102>;
104 				st-plgpio,enb-reg = <0x10>;
105 				st-plgpio,wdata-reg = <0x20>;
106 				st-plgpio,dir-reg = <0x30>;
107 				st-plgpio,ie-reg = <0x50>;
108 				st-plgpio,rdata-reg = <0x40>;
109 				st-plgpio,mis-reg = <0x60>;