dts/samsung/s3c6410-smdk6410.dts

1 // SPDX-License-Identifier: GPL-2.0
3  * Samsung S3C6410 based SMDK6410 board device tree source.
8  * Samsung's S3C6410 SoC.
11 /dts-v1/;
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
16 #include "s3c6410.dtsi"
19 	model = "Samsung SMDK6410 board based on S3C6410";
20 	compatible = "samsung,smdk6410", "samsung,s3c6410";
31 	fin_pll: oscillator-0 {
32 		compatible = "fixed-clock";
33 		clock-frequency = <12000000>;
34 		clock-output-names = "fin_pll";
35 		#clock-cells = <0>;
38 	xusbxti: oscillator-1 {
39 		compatible = "fixed-clock";
40 		clock-output-names = "xusbxti";
41 		clock-frequency = <48000000>;
42 		#clock-cells = <0>;
45 	srom-cs1-bus@18000000 {
46 		compatible = "simple-bus";
47 		#address-cells = <1>;
48 		#size-cells = <1>;
55 			interrupt-parent = <&gpn>;
57 			phy-mode = "mii";
58 			reg-io-width = <4>;
59 			smsc,force-internal-phy;
69 	pinctrl-names = "default";
70 	pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>;
71 	bus-width = <4>;
76 	pinctrl-names = "default";
77 	pinctrl-0 = <&uart0_data>, <&uart0_fctl>;
82 	pinctrl-names = "default";
83 	pinctrl-0 = <&uart1_data>;
88 	pinctrl-names = "default";
89 	pinctrl-0 = <&uart2_data>;
94 	pinctrl-names = "default";
95 	pinctrl-0 = <&uart3_data>;