dts/samsung/exynos4210-i9100.dts

25 		reg = <0x40000000 0x40000000>;
38 	vemmc_reg: regulator-0 {
106 			gpios = <&gpx2 0 GPIO_ACTIVE_LOW>;
133 	i2c_max17042_fuel: i2c-gpio-0 {
136 		#size-cells = <0>;
138 		sda-gpios = <&gpy4 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
148 			pinctrl-0 = <&max17042_fuel_irq>;
151 			reg = <0x36>;
160 		#size-cells = <0>;
162 		sda-gpios = <&gpc1 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
168 			reg = <0x2d>;
172 			clocks = <&camera 0>;
174 			stbyn-gpios = <&gpl2 0 GPIO_ACTIVE_LOW>;
190 		#size-cells = <0>;
193 		scl-gpios = <&gpk1 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
198 			reg = <0x20>;
212 		#size-cells = <0>;
219 		lcd@0 {
221 			reg = <0>;
246 					hsync-active = <0>;
247 					vsync-active = <0>;
248 					de-active = <0>;
249 					pixelclk-active = <0>;
264 			clock-frequency = <0>;
275 			#clock-cells = <0>;
282 	pinctrl-0 = <&cam_port_a_clk_active>;
295 	#size-cells = <0>;
342 	assigned-clock-rates = <0>, <160000000>;
351 	assigned-clock-rates = <0>, <160000000>;
359 	assigned-clock-rates = <0>, <160000000>;
368 	assigned-clock-rates = <0>, <160000000>;
374 	#size-cells = <0>;
379 	pinctrl-0 = <&lcd_clk>, <&lcd_data24>;
409 	samsung,i2c-slave-addr = <0x10>;
414 		reg = <0x19>;
416 		mount-matrix = "0", "-1", "0",
417 			       "1", "0", "0",
418 			       "0", "0", "1";
426 	samsung,i2c-slave-addr = <0x10>;
429 	pinctrl-0 = <&i2c3_bus>;
434 		reg = <0x4a>;
445 	samsung,i2c-slave-addr = <0x10>;
448 	pinctrl-0 = <&i2c5_bus>;
453 		reg = <0x66>;
463 		max8997,pmic-buck125-default-dvs-idx = <0>;
467 						 <&gpl0 0 GPIO_ACTIVE_HIGH>;
484 		pinctrl-0 = <&max8997_irq>, <&otg_gp>, <&usb_sel>;
579 				regulator-name = "VCC_3.0V_LCD";
657 				regulator-name = "VCC_SUB_2.0V";
709 	samsung,i2c-slave-addr = <0x10>;
712 	pinctrl-0 = <&i2c7_bus>;
717 		reg = <0x0c>;
725 	pinctrl-0 = <&sleep0>;
728 		gpa0-0-pin {
729 			samsung,pins = "gpa0-0";
772 		samsung,pin-val = <0>;
780 		samsung,pin-val = <0>;
784 		samsung,pins = "gpl1-0";
788 		samsung,pin-val = <0>;
796 		samsung,pin-val = <0>;
834 	pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_bus8>;
845 	pinctrl-0 = <&sd2_clk>, <&sd2_cmd>, <&sd2_bus4>;
853 	#size-cells = <0>;
861 	pinctrl-0 = <&sd3_clk>, <&sd3_cmd>, <&sd3_bus4>;
877 	pinctrl-0 = <&bt_en>, <&bt_res>, <&uart0_data>, <&uart0_fctl>;
883 		reset-gpios = <&gpl1 0 GPIO_ACTIVE_LOW>;