dts/samsung/exynos3250.dtsi

81 		clocks = <&cmu CLK_DIV_ACLK_200>;
89 		clocks = <&cmu CLK_DIV_ACLK_266>;
117 		clocks = <&cmu CLK_DIV_ACLK_160>;
125 		clocks = <&cmu CLK_DIV_GDL>;
133 		clocks = <&cmu CLK_DIV_ACLK_400_MCUISP>;
161 		clocks = <&cmu CLK_SCLK_MFC>;
169 		clocks = <&cmu CLK_DIV_ACLK_100>;
191 		clocks = <&cmu CLK_DIV_GDR>;
217 			clocks = <&cmu CLK_ARM_CLK>;
240 			clocks = <&cmu CLK_ARM_CLK>;
352 			clocks = <&cmu CLK_FIN_PLL>;
396 		cmu: clock-controller@10030000 {  label
397 			compatible = "samsung,exynos3250-cmu";
400 			assigned-clocks = <&cmu CLK_MOUT_ACLK_400_MCUISP_SUB>,
401 					  <&cmu CLK_MOUT_ACLK_266_SUB>;
402 			assigned-clock-parents = <&cmu CLK_FIN_PLL>,
403 						 <&cmu CLK_FIN_PLL>;
407 			compatible = "samsung,exynos3250-cmu-dmc";
425 			clocks = <&cmu CLK_TMU_APBIF>;
455 			clocks = <&cmu CLK_FIN_PLL>, <&cmu CLK_MCT>;
480 			clocks = <&cmu CLK_JPEG>, <&cmu CLK_SCLK_JPEG>;
483 			assigned-clocks = <&cmu CLK_MOUT_CAM_BLK>, <&cmu CLK_SCLK_JPEG>;
485 			assigned-clock-parents = <&cmu CLK_DIV_MPLL_PRE>;
495 			clocks = <&cmu CLK_SMMUJPEG>, <&cmu CLK_JPEG>;
507 			clocks = <&cmu CLK_SCLK_FIMD0>, <&cmu CLK_FIMD0>;
523 			clocks = <&cmu CLK_DSIM0>, <&cmu CLK_SCLK_MIPI0>;
535 			clocks = <&cmu CLK_SMMUFIMD0>, <&cmu CLK_FIMD0>;
544 			clocks = <&cmu CLK_USBOTG>;
555 			clocks = <&cmu CLK_SDMMC0>, <&cmu CLK_SCLK_MMC0>;
567 			clocks = <&cmu CLK_SDMMC1>, <&cmu CLK_SCLK_MMC1>;
579 			clocks = <&cmu CLK_SDMMC2>, <&cmu CLK_SCLK_MMC2>;
591 			clocks = <&cmu CLK_USBOTG>, <&cmu CLK_SCLK_UPLL>;
601 			clocks = <&cmu CLK_PDMA0>;
610 			clocks = <&cmu CLK_PDMA1>;
620 			clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>;
651 			clocks = <&cmu CLK_G3D>,
652 				 <&cmu CLK_SCLK_G3D>;
664 			clocks = <&cmu CLK_MFC>, <&cmu CLK_SCLK_MFC>;
674 			clocks = <&cmu CLK_SMMUMFC_L>, <&cmu CLK_MFC>;
683 			clocks = <&cmu CLK_UART0>, <&cmu CLK_SCLK_UART0>;
694 			clocks = <&cmu CLK_UART1>, <&cmu CLK_SCLK_UART1>;
705 			clocks = <&cmu CLK_UART2>, <&cmu CLK_SCLK_UART2>;
718 			clocks = <&cmu CLK_I2C0>;
731 			clocks = <&cmu CLK_I2C1>;
744 			clocks = <&cmu CLK_I2C2>;
757 			clocks = <&cmu CLK_I2C3>;
770 			clocks = <&cmu CLK_I2C4>;
783 			clocks = <&cmu CLK_I2C5>;
796 			clocks = <&cmu CLK_I2C6>;
809 			clocks = <&cmu CLK_I2C7>;
824 			clocks = <&cmu CLK_SPI0>, <&cmu CLK_SCLK_SPI0>;
841 			clocks = <&cmu CLK_SPI1>, <&cmu CLK_SCLK_SPI1>;
854 			clocks = <&cmu CLK_I2S>, <&cmu CLK_SCLK_I2S>;
896 			clocks = <&cmu CLK_PPMURIGHT>;
904 			clocks = <&cmu CLK_PPMULEFT>;
912 			clocks = <&cmu CLK_PPMUCAMIF>;
920 			clocks = <&cmu CLK_PPMULCD0>;
928 			clocks = <&cmu CLK_PPMUFILE>;
936 			clocks = <&cmu CLK_PPMUG3D>;
944 			clocks = <&cmu CLK_PPMUMFC_L>;