dts/rockchip/rk3188.dtsi

18 		#size-cells = <0>;
21 		cpu0: cpu@0 {
25 			reg = <0x0>;
35 			reg = <0x1>;
43 			reg = <0x2>;
51 			reg = <0x3>;
57 	cpu0_opp_table: opp-table-0 {
104 		reg = <0x10080000 0x8000>;
107 		ranges = <0 0x10080000 0x8000>;
109 		smp-sram@0 {
111 			reg = <0x0 0x50>;
117 		reg = <0x1010c000 0x1000>;
128 			#size-cells = <0>;
134 		reg = <0x1010e000 0x1000>;
145 			#size-cells = <0>;
151 		reg = <0x2000e000 0x20>;
159 		reg = <0x200380a0 0x20>;
167 		reg = <0x1011a000 0x2000>;
170 		pinctrl-0 = <&i2s0_bus>;
177 		#sound-dai-cells = <0>;
183 		reg = <0x1011e000 0x2000>;
184 		#sound-dai-cells = <0>;
191 		pinctrl-0 = <&spdif_tx>;
197 		reg = <0x20000000 0x1000>;
207 		reg = <0x20010000 0x4000>;
214 			reg = <0x17 0x1>;
229 			reg = <0x2000a000 0x100>;
242 			reg = <0x2003c000 0x100>;
255 			reg = <0x2003e000 0x100>;
268 			reg = <0x20080000 0x100>;
293 				rockchip,pins = <0 RK_PD0 2 &pcfg_pull_none>;
297 				rockchip,pins = <0 RK_PD2 2 &pcfg_pull_up>;
301 				rockchip,pins = <0 RK_PD3 2 &pcfg_pull_none>;
454 				rockchip,pins = <0 RK_PD6 1 &pcfg_pull_up>;
457 				rockchip,pins = <0 RK_PD7 1 &pcfg_pull_up>;
460 				rockchip,pins = <0 RK_PD4 1 &pcfg_pull_up>;
463 				rockchip,pins = <0 RK_PD5 1 &pcfg_pull_up>;
652 		#size-cells = <0>;
656 			reg = <0x10c>;
659 			#clock-cells = <0>;
660 			#phy-cells = <0>;
664 			reg = <0x11c>;
667 			#clock-cells = <0>;
668 			#phy-cells = <0>;
676 	pinctrl-0 = <&i2c0_xfer>;
682 	pinctrl-0 = <&i2c1_xfer>;
688 	pinctrl-0 = <&i2c2_xfer>;
694 	pinctrl-0 = <&i2c3_xfer>;
700 	pinctrl-0 = <&i2c4_xfer>;
708 		#size-cells = <0>;
730 			#power-domain-cells = <0>;
740 			#power-domain-cells = <0>;
747 			#power-domain-cells = <0>;
754 	pinctrl-0 = <&pwm0_out>;
759 	pinctrl-0 = <&pwm1_out>;
764 	pinctrl-0 = <&pwm2_out>;
769 	pinctrl-0 = <&pwm3_out>;
775 	pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>;
781 	pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>;
787 	pinctrl-0 = <&uart0_xfer>;
793 	pinctrl-0 = <&uart1_xfer>;
799 	pinctrl-0 = <&uart2_xfer>;
805 	pinctrl-0 = <&uart3_xfer>;