dts/renesas/sh73a0.dtsi

27 			clocks = <&cpg_clocks SH73A0_CLK_Z>;
36 			clocks = <&cpg_clocks SH73A0_CLK_Z>;
646 		cpg_clocks: cpg_clocks@e6150000 {  label
661 			clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
663 				 <&extalr_clk>, <&cpg_clocks SH73A0_CLK_MAIN>,
670 			clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
672 				 <&extalr_clk>, <&cpg_clocks SH73A0_CLK_MAIN>,
679 			clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
681 				 <&extalr_clk>, <&cpg_clocks SH73A0_CLK_MAIN>,
689 				 <&cpg_clocks SH73A0_CLK_PLL2>, <0>;
697 				 <&cpg_clocks SH73A0_CLK_PLL2>, <0>;
703 			clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
710 			clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
717 			clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
724 			clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
731 			clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
738 			clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
745 			clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
752 			clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
760 				 <&cpg_clocks SH73A0_CLK_PLL2>, <0>;
766 			clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
774 				 <&cpg_clocks SH73A0_CLK_PLL2>, <0>;
781 				 <&cpg_clocks SH73A0_CLK_PLL2>, <0>;
788 				 <&cpg_clocks SH73A0_CLK_PLL2>, <0>;
794 			clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
795 				 <&cpg_clocks SH73A0_CLK_MAIN>, <&extal2_clk>,
803 			clocks = <&cpg_clocks SH73A0_CLK_MAIN>;
810 			clocks = <&cpg_clocks SH73A0_CLK_PLL1>;
817 			clocks = <&cpg_clocks SH73A0_CLK_PLL1>;
824 			clocks = <&cpg_clocks SH73A0_CLK_PLL1>;
831 			clocks = <&cpg_clocks SH73A0_CLK_Z>;
841 			clocks = <&cpg_clocks SH73A0_CLK_HP>, <&sub_clk>;
852 			clocks = <&cpg_clocks SH73A0_CLK_B>,
853 				 <&cpg_clocks SH73A0_CLK_B>,
854 				 <&cpg_clocks SH73A0_CLK_B>,
855 				 <&cpg_clocks SH73A0_CLK_B>,
856 				 <&sub_clk>, <&cpg_clocks SH73A0_CLK_B>,
857 				 <&cpg_clocks SH73A0_CLK_HP>,
858 				 <&cpg_clocks SH73A0_CLK_ZG>,
859 				 <&cpg_clocks SH73A0_CLK_B>;
875 			clocks = <&sub_clk>, <&cpg_clocks SH73A0_CLK_HP>,
876 				 <&cpg_clocks SH73A0_CLK_HP>, <&sub_clk>,
900 				 <&cpg_clocks SH73A0_CLK_HP>, <&sub_clk>,
901 				 <&cpg_clocks SH73A0_CLK_HP>,
902 				 <&cpg_clocks SH73A0_CLK_HP>, <&flctl_clk>,
904 				 <&cpg_clocks SH73A0_CLK_HP>, <&sdhi2_clk>,
927 			clocks = <&cpg_clocks SH73A0_CLK_HP>,
928 				 <&cpg_clocks SH73A0_CLK_HP>, <&extalr_clk>;
940 			clocks = <&cpg_clocks SH73A0_CLK_HP>;