dts/renesas/r9a06g032-rzn1d400-db.dts

1 // SPDX-License-Identifier: GPL-2.0
3  * Device Tree Source for the RZN1D-DB Board
9 /dts-v1/;
11 #include <dt-bindings/pinctrl/rzn1-pinctrl.h>
12 #include <dt-bindings/net/pcs-rzn1-miic.h>
17 	model = "RZN1D-DB Board";
18 	compatible = "renesas,rzn1d400-db", "renesas,r9a06g032";
21 		stdout-path = "serial0:115200n8";
30 	pinctrl-0 = <&pins_can0>;
31 	pinctrl-names = "default";
38 	pinctrl-0 = <&pins_can1>;
39 	pinctrl-names = "default";
47 	renesas,miic-switch-portin = <MIIC_GMAC2_PORT>;
52 	phy-mode = "gmii";
54 	fixed-link {
56 		full-duplex;
61 	renesas,miic-input = <MIIC_SWITCH_PORTB>;
66 	renesas,miic-input = <MIIC_SWITCH_PORTA>;
74 		drive-strength = <6>;
80 		drive-strength = <6>;
96 		drive-strength = <6>;
97 		bias-disable;
113 		drive-strength = <6>;
114 		bias-disable;
127 &switch {
129 	#address-cells = <1>;
130 	#size-cells = <0>;
132 	pinctrl-names = "default";
133 	pinctrl-0 = <&pins_eth3>, <&pins_eth4>, <&pins_mdio1>;
138 		clock-frequency = <2500000>;
140 		#address-cells = <1>;
141 		#size-cells = <0>;
143 		switch0phy4: ethernet-phy@4 {
145 			micrel,led-mode = <1>;
148 		switch0phy5: ethernet-phy@5 {
150 			micrel,led-mode = <1>;
157 	phy-mode = "mii";
158 	phy-handle = <&switch0phy5>;
164 	phy-mode = "mii";
165 	phy-handle = <&switch0phy4>;
178 	timeout-sec = <60>;