Lines Matching full:cpg
8 #include <dt-bindings/clock/r8a7792-cpg-mssr.h>
54 clocks = <&cpg CPG_CORE R8A7792_CLK_Z>;
65 clocks = <&cpg CPG_CORE R8A7792_CLK_Z>;
122 clocks = <&cpg CPG_MOD 402>;
124 resets = <&cpg 402>;
138 clocks = <&cpg CPG_MOD 912>;
140 resets = <&cpg 912>;
153 clocks = <&cpg CPG_MOD 911>;
155 resets = <&cpg 911>;
168 clocks = <&cpg CPG_MOD 910>;
170 resets = <&cpg 910>;
183 clocks = <&cpg CPG_MOD 909>;
185 resets = <&cpg 909>;
198 clocks = <&cpg CPG_MOD 908>;
200 resets = <&cpg 908>;
213 clocks = <&cpg CPG_MOD 907>;
215 resets = <&cpg 907>;
228 clocks = <&cpg CPG_MOD 905>;
230 resets = <&cpg 905>;
243 clocks = <&cpg CPG_MOD 904>;
245 resets = <&cpg 904>;
258 clocks = <&cpg CPG_MOD 921>;
260 resets = <&cpg 921>;
273 clocks = <&cpg CPG_MOD 919>;
275 resets = <&cpg 919>;
288 clocks = <&cpg CPG_MOD 914>;
290 resets = <&cpg 914>;
303 clocks = <&cpg CPG_MOD 913>;
305 resets = <&cpg 913>;
313 cpg: clock-controller@e6150000 { label
314 compatible = "renesas,r8a7792-cpg-mssr";
349 clocks = <&cpg CPG_MOD 407>;
351 resets = <&cpg 407>;
361 clocks = <&cpg CPG_MOD 125>;
364 resets = <&cpg 125>;
376 clocks = <&cpg CPG_MOD 111>;
379 resets = <&cpg 111>;
391 clocks = <&cpg CPG_MOD 122>;
394 resets = <&cpg 122>;
406 clocks = <&cpg CPG_MOD 121>;
409 resets = <&cpg 121>;
440 clocks = <&cpg CPG_MOD 931>;
442 resets = <&cpg 931>;
454 clocks = <&cpg CPG_MOD 930>;
456 resets = <&cpg 930>;
468 clocks = <&cpg CPG_MOD 929>;
470 resets = <&cpg 929>;
482 clocks = <&cpg CPG_MOD 928>;
484 resets = <&cpg 928>;
496 clocks = <&cpg CPG_MOD 927>;
498 resets = <&cpg 927>;
510 clocks = <&cpg CPG_MOD 925>;
512 resets = <&cpg 925>;
527 clocks = <&cpg CPG_MOD 926>;
532 resets = <&cpg 926>;
561 clocks = <&cpg CPG_MOD 219>;
564 resets = <&cpg 219>;
594 clocks = <&cpg CPG_MOD 218>;
597 resets = <&cpg 218>;
607 clocks = <&cpg CPG_MOD 812>;
610 resets = <&cpg 812>;
620 clocks = <&cpg CPG_MOD 917>;
625 resets = <&cpg 917>;
637 clocks = <&cpg CPG_MOD 721>,
638 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
644 resets = <&cpg 721>;
653 clocks = <&cpg CPG_MOD 720>,
654 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
660 resets = <&cpg 720>;
669 clocks = <&cpg CPG_MOD 719>,
670 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
676 resets = <&cpg 719>;
685 clocks = <&cpg CPG_MOD 718>,
686 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
692 resets = <&cpg 718>;
701 clocks = <&cpg CPG_MOD 717>,
702 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
708 resets = <&cpg 717>;
717 clocks = <&cpg CPG_MOD 716>,
718 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
724 resets = <&cpg 716>;
733 clocks = <&cpg CPG_MOD 000>;
738 resets = <&cpg 000>;
749 clocks = <&cpg CPG_MOD 208>;
754 resets = <&cpg 208>;
765 clocks = <&cpg CPG_MOD 916>,
766 <&cpg CPG_CORE R8A7792_CLK_RCAN>, <&can_clk>;
769 resets = <&cpg 916>;
778 clocks = <&cpg CPG_MOD 915>,
779 <&cpg CPG_CORE R8A7792_CLK_RCAN>, <&can_clk>;
782 resets = <&cpg 915>;
791 clocks = <&cpg CPG_MOD 811>;
793 resets = <&cpg 811>;
802 clocks = <&cpg CPG_MOD 810>;
804 resets = <&cpg 810>;
813 clocks = <&cpg CPG_MOD 809>;
815 resets = <&cpg 809>;
824 clocks = <&cpg CPG_MOD 808>;
826 resets = <&cpg 808>;
835 clocks = <&cpg CPG_MOD 805>;
837 resets = <&cpg 805>;
846 clocks = <&cpg CPG_MOD 804>;
848 resets = <&cpg 804>;
860 clocks = <&cpg CPG_MOD 314>;
862 resets = <&cpg 314>;
876 clocks = <&cpg CPG_MOD 408>;
879 resets = <&cpg 408>;
886 clocks = <&cpg CPG_MOD 131>;
888 resets = <&cpg 131>;
895 clocks = <&cpg CPG_MOD 128>;
897 resets = <&cpg 128>;
904 clocks = <&cpg CPG_MOD 127>;
906 resets = <&cpg 127>;
914 clocks = <&cpg CPG_MOD 106>;
916 resets = <&cpg 106>;
924 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
926 resets = <&cpg 724>;
958 clocks = <&cpg CPG_MOD 124>;
961 resets = <&cpg 124>;
978 clocks = <&cpg CPG_MOD 329>;
981 resets = <&cpg 329>;