dts/renesas/r8a7790.dtsi

10 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
78 			clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
100 			clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
122 			clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
144 			clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
166 			clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
178 			clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
190 			clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
202 			clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
278 			clocks = <&cpg CPG_MOD 402>;
280 			resets = <&cpg 402>;
294 			clocks = <&cpg CPG_MOD 912>;
296 			resets = <&cpg 912>;
309 			clocks = <&cpg CPG_MOD 911>;
311 			resets = <&cpg 911>;
324 			clocks = <&cpg CPG_MOD 910>;
326 			resets = <&cpg 910>;
339 			clocks = <&cpg CPG_MOD 909>;
341 			resets = <&cpg 909>;
354 			clocks = <&cpg CPG_MOD 908>;
356 			resets = <&cpg 908>;
369 			clocks = <&cpg CPG_MOD 907>;
371 			resets = <&cpg 907>;
383 			clocks = <&cpg CPG_MOD 304>;
385 			resets = <&cpg 304>;
390 		cpg: clock-controller@e6150000 {  label
391 			compatible = "renesas,r8a7790-cpg-mssr";
432 			clocks = <&cpg CPG_MOD 407>;
434 			resets = <&cpg 407>;
444 			clocks = <&cpg CPG_MOD 125>;
447 			resets = <&cpg 125>;
459 			clocks = <&cpg CPG_MOD 111>;
462 			resets = <&cpg 111>;
474 			clocks = <&cpg CPG_MOD 122>;
477 			resets = <&cpg 122>;
488 			clocks = <&cpg CPG_MOD 121>;
491 			resets = <&cpg 121>;
501 			clocks = <&cpg CPG_MOD 522>;
503 			resets = <&cpg 522>;
592 			clocks = <&cpg CPG_MOD 931>;
594 			resets = <&cpg 931>;
606 			clocks = <&cpg CPG_MOD 930>;
608 			resets = <&cpg 930>;
620 			clocks = <&cpg CPG_MOD 929>;
622 			resets = <&cpg 929>;
634 			clocks = <&cpg CPG_MOD 928>;
636 			resets = <&cpg 928>;
649 			clocks = <&cpg CPG_MOD 318>;
654 			resets = <&cpg 318>;
666 			clocks = <&cpg CPG_MOD 323>;
671 			resets = <&cpg 323>;
683 			clocks = <&cpg CPG_MOD 300>;
688 			resets = <&cpg 300>;
700 			clocks = <&cpg CPG_MOD 926>;
705 			resets = <&cpg 926>;
714 			clocks = <&cpg CPG_MOD 704>;
719 			resets = <&cpg 704>;
732 			clocks = <&cpg CPG_MOD 704>;
735 			resets = <&cpg 704>;
755 			clocks = <&cpg CPG_MOD 330>;
757 			resets = <&cpg 330>;
769 			clocks = <&cpg CPG_MOD 331>;
771 			resets = <&cpg 331>;
801 			clocks = <&cpg CPG_MOD 219>;
804 			resets = <&cpg 219>;
834 			clocks = <&cpg CPG_MOD 218>;
837 			resets = <&cpg 218>;
847 			clocks = <&cpg CPG_MOD 812>;
850 			resets = <&cpg 812>;
860 			clocks = <&cpg CPG_MOD 917>;
865 			resets = <&cpg 917>;
877 			clocks = <&cpg CPG_MOD 204>;
883 			resets = <&cpg 204>;
892 			clocks = <&cpg CPG_MOD 203>;
898 			resets = <&cpg 203>;
907 			clocks = <&cpg CPG_MOD 202>;
913 			resets = <&cpg 202>;
922 			clocks = <&cpg CPG_MOD 206>;
928 			resets = <&cpg 206>;
937 			clocks = <&cpg CPG_MOD 207>;
943 			resets = <&cpg 207>;
952 			clocks = <&cpg CPG_MOD 216>;
958 			resets = <&cpg 216>;
968 			clocks = <&cpg CPG_MOD 721>,
969 				 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
975 			resets = <&cpg 721>;
985 			clocks = <&cpg CPG_MOD 720>,
986 				 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
992 			resets = <&cpg 720>;
1002 			clocks = <&cpg CPG_MOD 310>,
1003 				 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
1009 			resets = <&cpg 310>;
1018 			clocks = <&cpg CPG_MOD 717>,
1019 				 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
1025 			resets = <&cpg 717>;
1034 			clocks = <&cpg CPG_MOD 716>,
1035 				 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
1041 			resets = <&cpg 716>;
1050 			clocks = <&cpg CPG_MOD 0>;
1055 			resets = <&cpg 0>;
1066 			clocks = <&cpg CPG_MOD 208>;
1071 			resets = <&cpg 208>;
1082 			clocks = <&cpg CPG_MOD 205>;
1087 			resets = <&cpg 205>;
1098 			clocks = <&cpg CPG_MOD 215>;
1103 			resets = <&cpg 215>;
1112 			clocks = <&cpg CPG_MOD 523>;
1114 			resets = <&cpg 523>;
1122 			clocks = <&cpg CPG_MOD 523>;
1124 			resets = <&cpg 523>;
1132 			clocks = <&cpg CPG_MOD 523>;
1134 			resets = <&cpg 523>;
1142 			clocks = <&cpg CPG_MOD 523>;
1144 			resets = <&cpg 523>;
1152 			clocks = <&cpg CPG_MOD 523>;
1154 			resets = <&cpg 523>;
1162 			clocks = <&cpg CPG_MOD 523>;
1164 			resets = <&cpg 523>;
1172 			clocks = <&cpg CPG_MOD 523>;
1174 			resets = <&cpg 523>;
1184 			clocks = <&cpg CPG_MOD 916>,
1185 				 <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
1188 			resets = <&cpg 916>;
1197 			clocks = <&cpg CPG_MOD 915>,
1198 				 <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
1201 			resets = <&cpg 915>;
1210 			clocks = <&cpg CPG_MOD 811>;
1212 			resets = <&cpg 811>;
1221 			clocks = <&cpg CPG_MOD 810>;
1223 			resets = <&cpg 810>;
1232 			clocks = <&cpg CPG_MOD 809>;
1234 			resets = <&cpg 809>;
1243 			clocks = <&cpg CPG_MOD 808>;
1245 			resets = <&cpg 808>;
1265 			clocks = <&cpg CPG_MOD 1005>,
1266 				 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1267 				 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1268 				 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1269 				 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1270 				 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1271 				 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1272 				 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1273 				 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1274 				 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1275 				 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1276 				 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1277 				 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1278 				 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1280 				 <&cpg CPG_CORE R8A7790_CLK_M2>;
1293 			resets = <&cpg 1005>,
1294 				 <&cpg 1006>, <&cpg 1007>,
1295 				 <&cpg 1008>, <&cpg 1009>,
1296 				 <&cpg 1010>, <&cpg 1011>,
1297 				 <&cpg 1012>, <&cpg 1013>,
1298 				 <&cpg 1014>, <&cpg 1015>;
1473 			clocks = <&cpg CPG_MOD 502>;
1476 			resets = <&cpg 502>;
1504 			clocks = <&cpg CPG_MOD 501>;
1507 			resets = <&cpg 501>;
1517 			clocks = <&cpg CPG_MOD 328>;
1519 			resets = <&cpg 328>;
1532 			clocks = <&cpg CPG_MOD 703>;
1534 			resets = <&cpg 703>;
1567 			clocks = <&cpg CPG_MOD 703>;
1569 			resets = <&cpg 703>;
1587 			clocks = <&cpg CPG_MOD 703>;
1589 			resets = <&cpg 703>;
1623 			clocks = <&cpg CPG_MOD 314>;
1629 			resets = <&cpg 314>;
1638 			clocks = <&cpg CPG_MOD 313>;
1644 			resets = <&cpg 313>;
1653 			clocks = <&cpg CPG_MOD 312>;
1659 			resets = <&cpg 312>;
1668 			clocks = <&cpg CPG_MOD 311>;
1674 			resets = <&cpg 311>;
1683 			clocks = <&cpg CPG_MOD 315>;
1688 			resets = <&cpg 315>;
1699 			clocks = <&cpg CPG_MOD 305>;
1704 			resets = <&cpg 305>;
1715 			clocks = <&cpg CPG_MOD 815>;
1717 			resets = <&cpg 815>;
1726 			clocks = <&cpg CPG_MOD 814>;
1728 			resets = <&cpg 814>;
1737 			clocks = <&cpg CPG_MOD 813>;
1739 			resets = <&cpg 813>;
1754 			clocks = <&cpg CPG_MOD 408>;
1757 			resets = <&cpg 408>;
1781 			clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1784 			resets = <&cpg 319>;
1792 			clocks = <&cpg CPG_MOD 130>;
1794 			resets = <&cpg 130>;
1801 			clocks = <&cpg CPG_MOD 131>;
1803 			resets = <&cpg 131>;
1810 			clocks = <&cpg CPG_MOD 128>;
1812 			resets = <&cpg 128>;
1819 			clocks = <&cpg CPG_MOD 127>;
1821 			resets = <&cpg 127>;
1828 			clocks = <&cpg CPG_MOD 119>;
1830 			resets = <&cpg 119>;
1837 			clocks = <&cpg CPG_MOD 118>;
1839 			resets = <&cpg 118>;
1846 			clocks = <&cpg CPG_MOD 117>;
1848 			resets = <&cpg 117>;
1856 			clocks = <&cpg CPG_MOD 106>;
1858 			resets = <&cpg 106>;
1867 			clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
1868 				 <&cpg CPG_MOD 722>;
1870 			resets = <&cpg 724>;
1901 			clocks = <&cpg CPG_MOD 726>;
1903 			resets = <&cpg 726>;
1927 			clocks = <&cpg CPG_MOD 725>;
1929 			resets = <&cpg 725>;
1961 			clocks = <&cpg CPG_MOD 124>;
1964 			resets = <&cpg 124>;
1981 			clocks = <&cpg CPG_MOD 329>;
1984 			resets = <&cpg 329>;