Lines Matching full:cpg
10 #include <dt-bindings/clock/r8a7745-cpg-mssr.h>
73 clocks = <&cpg CPG_CORE R8A7745_CLK_Z2>;
84 clocks = <&cpg CPG_CORE R8A7745_CLK_Z2>;
139 clocks = <&cpg CPG_MOD 912>;
141 resets = <&cpg 912>;
154 clocks = <&cpg CPG_MOD 911>;
156 resets = <&cpg 911>;
169 clocks = <&cpg CPG_MOD 910>;
171 resets = <&cpg 910>;
184 clocks = <&cpg CPG_MOD 909>;
186 resets = <&cpg 909>;
199 clocks = <&cpg CPG_MOD 908>;
201 resets = <&cpg 908>;
214 clocks = <&cpg CPG_MOD 907>;
216 resets = <&cpg 907>;
229 clocks = <&cpg CPG_MOD 905>;
231 resets = <&cpg 905>;
242 clocks = <&cpg CPG_MOD 304>;
244 resets = <&cpg 304>;
249 cpg: clock-controller@e6150000 { label
250 compatible = "renesas,r8a7745-cpg-mssr";
275 clocks = <&cpg CPG_MOD 402>;
277 resets = <&cpg 402>;
302 clocks = <&cpg CPG_MOD 407>;
304 resets = <&cpg 407>;
314 clocks = <&cpg CPG_MOD 125>;
317 resets = <&cpg 125>;
329 clocks = <&cpg CPG_MOD 111>;
332 resets = <&cpg 111>;
344 clocks = <&cpg CPG_MOD 122>;
347 resets = <&cpg 122>;
358 clocks = <&cpg CPG_MOD 121>;
361 resets = <&cpg 121>;
458 clocks = <&cpg CPG_MOD 931>;
460 resets = <&cpg 931>;
472 clocks = <&cpg CPG_MOD 930>;
474 resets = <&cpg 930>;
486 clocks = <&cpg CPG_MOD 929>;
488 resets = <&cpg 929>;
500 clocks = <&cpg CPG_MOD 928>;
502 resets = <&cpg 928>;
514 clocks = <&cpg CPG_MOD 927>;
516 resets = <&cpg 927>;
528 clocks = <&cpg CPG_MOD 925>;
530 resets = <&cpg 925>;
543 clocks = <&cpg CPG_MOD 318>;
548 resets = <&cpg 318>;
560 clocks = <&cpg CPG_MOD 323>;
565 resets = <&cpg 323>;
574 clocks = <&cpg CPG_MOD 704>;
579 resets = <&cpg 704>;
592 clocks = <&cpg CPG_MOD 704>;
595 resets = <&cpg 704>;
615 clocks = <&cpg CPG_MOD 330>;
617 resets = <&cpg 330>;
629 clocks = <&cpg CPG_MOD 331>;
631 resets = <&cpg 331>;
661 clocks = <&cpg CPG_MOD 219>;
664 resets = <&cpg 219>;
694 clocks = <&cpg CPG_MOD 218>;
697 resets = <&cpg 218>;
707 clocks = <&cpg CPG_MOD 812>;
710 resets = <&cpg 812>;
720 clocks = <&cpg CPG_MOD 917>;
728 resets = <&cpg 917>;
737 clocks = <&cpg CPG_MOD 204>;
743 resets = <&cpg 204>;
752 clocks = <&cpg CPG_MOD 203>;
758 resets = <&cpg 203>;
767 clocks = <&cpg CPG_MOD 202>;
773 resets = <&cpg 202>;
782 clocks = <&cpg CPG_MOD 1106>;
788 resets = <&cpg 1106>;
797 clocks = <&cpg CPG_MOD 1107>;
803 resets = <&cpg 1107>;
812 clocks = <&cpg CPG_MOD 1108>;
818 resets = <&cpg 1108>;
827 clocks = <&cpg CPG_MOD 206>;
833 resets = <&cpg 206>;
842 clocks = <&cpg CPG_MOD 207>;
848 resets = <&cpg 207>;
857 clocks = <&cpg CPG_MOD 216>;
863 resets = <&cpg 216>;
872 clocks = <&cpg CPG_MOD 721>,
873 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
879 resets = <&cpg 721>;
888 clocks = <&cpg CPG_MOD 720>,
889 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
895 resets = <&cpg 720>;
904 clocks = <&cpg CPG_MOD 719>,
905 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
911 resets = <&cpg 719>;
920 clocks = <&cpg CPG_MOD 718>,
921 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
927 resets = <&cpg 718>;
936 clocks = <&cpg CPG_MOD 715>,
937 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
943 resets = <&cpg 715>;
952 clocks = <&cpg CPG_MOD 714>,
953 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
959 resets = <&cpg 714>;
968 clocks = <&cpg CPG_MOD 717>,
969 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
975 resets = <&cpg 717>;
984 clocks = <&cpg CPG_MOD 716>,
985 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
991 resets = <&cpg 716>;
1000 clocks = <&cpg CPG_MOD 713>,
1001 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
1007 resets = <&cpg 713>;
1016 clocks = <&cpg CPG_MOD 000>;
1023 resets = <&cpg 000>;
1032 clocks = <&cpg CPG_MOD 208>;
1039 resets = <&cpg 208>;
1048 clocks = <&cpg CPG_MOD 205>;
1055 resets = <&cpg 205>;
1062 clocks = <&cpg CPG_MOD 523>;
1064 resets = <&cpg 523>;
1072 clocks = <&cpg CPG_MOD 523>;
1074 resets = <&cpg 523>;
1082 clocks = <&cpg CPG_MOD 523>;
1084 resets = <&cpg 523>;
1092 clocks = <&cpg CPG_MOD 523>;
1094 resets = <&cpg 523>;
1102 clocks = <&cpg CPG_MOD 523>;
1104 resets = <&cpg 523>;
1112 clocks = <&cpg CPG_MOD 523>;
1114 resets = <&cpg 523>;
1122 clocks = <&cpg CPG_MOD 523>;
1124 resets = <&cpg 523>;
1134 clocks = <&cpg CPG_MOD 916>,
1135 <&cpg CPG_CORE R8A7745_CLK_RCAN>,
1139 resets = <&cpg 916>;
1148 clocks = <&cpg CPG_MOD 915>,
1149 <&cpg CPG_CORE R8A7745_CLK_RCAN>,
1153 resets = <&cpg 915>;
1162 clocks = <&cpg CPG_MOD 811>;
1164 resets = <&cpg 811>;
1173 clocks = <&cpg CPG_MOD 810>;
1175 resets = <&cpg 810>;
1195 clocks = <&cpg CPG_MOD 1005>,
1196 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1197 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1198 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1199 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1200 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1201 <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
1202 <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>,
1203 <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>,
1204 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1205 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1206 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1208 <&cpg CPG_CORE R8A7745_CLK_M2>;
1220 resets = <&cpg 1005>,
1221 <&cpg 1006>, <&cpg 1007>, <&cpg 1008>,
1222 <&cpg 1009>, <&cpg 1010>, <&cpg 1011>,
1223 <&cpg 1012>, <&cpg 1013>, <&cpg 1014>,
1224 <&cpg 1015>;
1382 clocks = <&cpg CPG_MOD 502>;
1385 resets = <&cpg 502>;
1397 clocks = <&cpg CPG_MOD 703>;
1399 resets = <&cpg 703>;
1432 clocks = <&cpg CPG_MOD 703>;
1434 resets = <&cpg 703>;
1465 clocks = <&cpg CPG_MOD 314>;
1471 resets = <&cpg 314>;
1480 clocks = <&cpg CPG_MOD 312>;
1486 resets = <&cpg 312>;
1495 clocks = <&cpg CPG_MOD 311>;
1501 resets = <&cpg 311>;
1510 clocks = <&cpg CPG_MOD 315>;
1515 resets = <&cpg 315>;
1526 clocks = <&cpg CPG_MOD 813>;
1528 resets = <&cpg 813>;
1543 clocks = <&cpg CPG_MOD 408>;
1546 resets = <&cpg 408>;
1553 clocks = <&cpg CPG_MOD 131>;
1555 resets = <&cpg 131>;
1562 clocks = <&cpg CPG_MOD 128>;
1564 resets = <&cpg 128>;
1572 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
1574 resets = <&cpg 724>;
1606 clocks = <&cpg CPG_MOD 124>;
1609 resets = <&cpg 124>;
1625 clocks = <&cpg CPG_MOD 329>;
1628 resets = <&cpg 329>;