dts/renesas/r8a7744.dtsi

10 #include <dt-bindings/clock/r8a7744-cpg-mssr.h>
58 			clocks = <&cpg CPG_CORE R8A7744_CLK_Z>;
78 			clocks = <&cpg CPG_CORE R8A7744_CLK_Z>;
144 			clocks = <&cpg CPG_MOD 402>;
146 			resets = <&cpg 402>;
160 			clocks = <&cpg CPG_MOD 912>;
162 			resets = <&cpg 912>;
175 			clocks = <&cpg CPG_MOD 911>;
177 			resets = <&cpg 911>;
190 			clocks = <&cpg CPG_MOD 910>;
192 			resets = <&cpg 910>;
205 			clocks = <&cpg CPG_MOD 909>;
207 			resets = <&cpg 909>;
220 			clocks = <&cpg CPG_MOD 908>;
222 			resets = <&cpg 908>;
235 			clocks = <&cpg CPG_MOD 907>;
237 			resets = <&cpg 907>;
250 			clocks = <&cpg CPG_MOD 905>;
252 			resets = <&cpg 905>;
265 			clocks = <&cpg CPG_MOD 904>;
267 			resets = <&cpg 904>;
278 			clocks = <&cpg CPG_MOD 304>;
280 			resets = <&cpg 304>;
285 		cpg: clock-controller@e6150000 {  label
286 			compatible = "renesas,r8a7744-cpg-mssr";
327 			clocks = <&cpg CPG_MOD 407>;
329 			resets = <&cpg 407>;
339 			clocks = <&cpg CPG_MOD 125>;
342 			resets = <&cpg 125>;
354 			clocks = <&cpg CPG_MOD 111>;
357 			resets = <&cpg 111>;
369 			clocks = <&cpg CPG_MOD 122>;
372 			resets = <&cpg 122>;
383 			clocks = <&cpg CPG_MOD 121>;
386 			resets = <&cpg 121>;
395 			clocks = <&cpg CPG_MOD 522>;
397 			resets = <&cpg 522>;
498 			clocks = <&cpg CPG_MOD 931>;
500 			resets = <&cpg 931>;
512 			clocks = <&cpg CPG_MOD 930>;
514 			resets = <&cpg 930>;
526 			clocks = <&cpg CPG_MOD 929>;
528 			resets = <&cpg 929>;
540 			clocks = <&cpg CPG_MOD 928>;
542 			resets = <&cpg 928>;
554 			clocks = <&cpg CPG_MOD 927>;
556 			resets = <&cpg 927>;
569 			clocks = <&cpg CPG_MOD 925>;
571 			resets = <&cpg 925>;
584 			clocks = <&cpg CPG_MOD 318>;
589 			resets = <&cpg 318>;
601 			clocks = <&cpg CPG_MOD 323>;
606 			resets = <&cpg 323>;
619 			clocks = <&cpg CPG_MOD 926>;
624 			resets = <&cpg 926>;
633 			clocks = <&cpg CPG_MOD 704>;
638 			resets = <&cpg 704>;
651 			clocks = <&cpg CPG_MOD 704>;
654 			resets = <&cpg 704>;
674 			clocks = <&cpg CPG_MOD 330>;
676 			resets = <&cpg 330>;
688 			clocks = <&cpg CPG_MOD 331>;
690 			resets = <&cpg 331>;
720 			clocks = <&cpg CPG_MOD 219>;
723 			resets = <&cpg 219>;
753 			clocks = <&cpg CPG_MOD 218>;
756 			resets = <&cpg 218>;
766 			clocks = <&cpg CPG_MOD 812>;
769 			resets = <&cpg 812>;
779 			clocks = <&cpg CPG_MOD 917>;
787 			resets = <&cpg 917>;
796 			clocks = <&cpg CPG_MOD 204>;
802 			resets = <&cpg 204>;
811 			clocks = <&cpg CPG_MOD 203>;
817 			resets = <&cpg 203>;
826 			clocks = <&cpg CPG_MOD 202>;
832 			resets = <&cpg 202>;
841 			clocks = <&cpg CPG_MOD 1106>;
847 			resets = <&cpg 1106>;
856 			clocks = <&cpg CPG_MOD 1107>;
862 			resets = <&cpg 1107>;
871 			clocks = <&cpg CPG_MOD 1108>;
877 			resets = <&cpg 1108>;
886 			clocks = <&cpg CPG_MOD 206>;
892 			resets = <&cpg 206>;
901 			clocks = <&cpg CPG_MOD 207>;
907 			resets = <&cpg 207>;
916 			clocks = <&cpg CPG_MOD 216>;
922 			resets = <&cpg 216>;
931 			clocks = <&cpg CPG_MOD 721>,
932 				 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
938 			resets = <&cpg 721>;
947 			clocks = <&cpg CPG_MOD 720>,
948 				 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
954 			resets = <&cpg 720>;
963 			clocks = <&cpg CPG_MOD 719>,
964 				 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
970 			resets = <&cpg 719>;
979 			clocks = <&cpg CPG_MOD 718>,
980 				 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
986 			resets = <&cpg 718>;
995 			clocks = <&cpg CPG_MOD 715>,
996 				 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
1002 			resets = <&cpg 715>;
1011 			clocks = <&cpg CPG_MOD 714>,
1012 				 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
1018 			resets = <&cpg 714>;
1027 			clocks = <&cpg CPG_MOD 717>,
1028 				 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
1034 			resets = <&cpg 717>;
1043 			clocks = <&cpg CPG_MOD 716>,
1044 				 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
1050 			resets = <&cpg 716>;
1059 			clocks = <&cpg CPG_MOD 713>,
1060 				 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
1066 			resets = <&cpg 713>;
1075 			clocks = <&cpg CPG_MOD 000>;
1082 			resets = <&cpg 000>;
1091 			clocks = <&cpg CPG_MOD 208>;
1098 			resets = <&cpg 208>;
1107 			clocks = <&cpg CPG_MOD 205>;
1114 			resets = <&cpg 205>;
1121 			clocks = <&cpg CPG_MOD 523>;
1123 			resets = <&cpg 523>;
1131 			clocks = <&cpg CPG_MOD 523>;
1133 			resets = <&cpg 523>;
1141 			clocks = <&cpg CPG_MOD 523>;
1143 			resets = <&cpg 523>;
1151 			clocks = <&cpg CPG_MOD 523>;
1153 			resets = <&cpg 523>;
1161 			clocks = <&cpg CPG_MOD 523>;
1163 			resets = <&cpg 523>;
1171 			clocks = <&cpg CPG_MOD 523>;
1173 			resets = <&cpg 523>;
1181 			clocks = <&cpg CPG_MOD 523>;
1183 			resets = <&cpg 523>;
1193 			clocks = <&cpg CPG_MOD 916>,
1194 				 <&cpg CPG_CORE R8A7744_CLK_RCAN>,
1198 			resets = <&cpg 916>;
1207 			clocks = <&cpg CPG_MOD 915>,
1208 				 <&cpg CPG_CORE R8A7744_CLK_RCAN>,
1212 			resets = <&cpg 915>;
1221 			clocks = <&cpg CPG_MOD 811>;
1223 			resets = <&cpg 811>;
1232 			clocks = <&cpg CPG_MOD 810>;
1234 			resets = <&cpg 810>;
1243 			clocks = <&cpg CPG_MOD 809>;
1245 			resets = <&cpg 809>;
1265 			clocks = <&cpg CPG_MOD 1005>,
1266 				 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1267 				 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1268 				 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1269 				 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1270 				 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1271 				 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1272 				 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1273 				 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1274 				 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1275 				 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1276 				 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1277 				 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1278 				 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1280 				 <&cpg CPG_CORE R8A7744_CLK_M2>;
1291 			resets = <&cpg 1005>,
1292 				 <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
1293 				 <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
1294 				 <&cpg 1014>, <&cpg 1015>;
1457 			clocks = <&cpg CPG_MOD 502>;
1460 			resets = <&cpg 502>;
1488 			clocks = <&cpg CPG_MOD 501>;
1491 			resets = <&cpg 501>;
1508 			clocks = <&cpg CPG_MOD 328>;
1510 			resets = <&cpg 328>;
1523 			clocks = <&cpg CPG_MOD 703>;
1525 			resets = <&cpg 703>;
1558 			clocks = <&cpg CPG_MOD 703>;
1560 			resets = <&cpg 703>;
1591 			clocks = <&cpg CPG_MOD 314>;
1597 			resets = <&cpg 314>;
1606 			clocks = <&cpg CPG_MOD 312>;
1612 			resets = <&cpg 312>;
1621 			clocks = <&cpg CPG_MOD 311>;
1627 			resets = <&cpg 311>;
1636 			clocks = <&cpg CPG_MOD 315>;
1641 			resets = <&cpg 315>;
1655 			clocks = <&cpg CPG_MOD 408>;
1658 			resets = <&cpg 408>;
1682 			clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1685 			resets = <&cpg 319>;
1693 			clocks = <&cpg CPG_MOD 131>;
1695 			resets = <&cpg 131>;
1702 			clocks = <&cpg CPG_MOD 128>;
1704 			resets = <&cpg 128>;
1711 			clocks = <&cpg CPG_MOD 127>;
1713 			resets = <&cpg 127>;
1721 			clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
1723 			resets = <&cpg 724>;
1748 			clocks = <&cpg CPG_MOD 726>;
1750 			resets = <&cpg 726>;
1782 			clocks = <&cpg CPG_MOD 124>;
1785 			resets = <&cpg 124>;
1801 			clocks = <&cpg CPG_MOD 329>;
1804 			resets = <&cpg 329>;