Lines Matching +full:ether +full:- +full:link +full:- +full:active +full:- +full:low
1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the SK-RZG1M board
5 * Copyright (C) 2016-2017 Cogent Embedded, Inc.
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
13 model = "SK-RZG1M";
14 compatible = "renesas,sk-rzg1m", "renesas,r8a7743";
22 stdout-path = "serial0:115200n8";
37 clock-frequency = <20000000>;
46 ether_pins: ether {
58 pinctrl-0 = <&scif0_pins>;
59 pinctrl-names = "default";
64 ðer {
65 pinctrl-0 = <ðer_pins>, <&phy1_pins>;
66 pinctrl-names = "default";
68 phy-handle = <&phy1>;
69 renesas,ether-link-active-low;
72 phy1: ethernet-phy@1 {
73 compatible = "ethernet-phy-id0022.1537",
74 "ethernet-phy-ieee802.3-c22";
76 interrupt-parent = <&irqc>;
78 micrel,led-mode = <1>;
79 reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;