Lines Matching +full:0 +full:x01c06000
20 qcom,msm-id = <458 0x10000>, <483 0x10000>, <509 0x10000>;
25 reg = <0 0>;
33 #clock-cells = <0>;
40 #clock-cells = <0>;
46 #clock-cells = <0>;
52 #size-cells = <0>;
54 cpu0: cpu@0 {
57 reg = <0x0>;
115 reg = <0x8fcad000 0x40000>;
120 reg = <0x8fcfd000 0x1000>;
125 reg = <0x8fd00000 0x80000>;
130 reg = <0x8fd80000 0x80000>;
135 reg = <0x8fe00000 0x20000>;
140 reg = <0x8fe20000 0xc0000>;
147 reg = <0x8fee0000 0x20000>;
153 reg = <0x8ff00000 0x100000>;
158 reg = <0x90000000 0x500000>;
163 reg = <0x15800000 0x800000>;
172 qcom,local-pid = <0>;
206 reg = <0x00100000 0x001f7400>;
211 <0>;
224 reg = <0x00831000 0x200>;
234 reg = <0xff4000 0x120>;
235 #phy-cells = <0>;
244 reg = <0x00ff6000 0x2000>;
255 #clock-cells = <0>;
256 #phy-cells = <0>;
269 reg = <0x01620000 0x31200>;
276 reg = <0x01b04000 0x1c000>;
281 qcom,ee = <0>;
288 reg = <0x01b30000 0x10000>;
290 #size-cells = <0>;
295 dmas = <&qpic_bam 0>,
304 reg = <0x01c00000 0x3000>,
305 <0x40000000 0xf1d>,
306 <0x40000f20 0xa8>,
307 <0x40001000 0x1000>,
308 <0x40200000 0x100000>,
309 <0x01c03000 0x3000>;
317 qcom,perst-regs = <&tcsr 0xb258 0xb270>;
354 reg = <0x01c06000 0x2000>;
375 #clock-cells = <0>;
378 #phy-cells = <0>;
385 reg = <0x01f40000 0x40000>;
391 reg = <0x01fc0000 0x1000>;
397 reg = <0x03f40000 0x10000>,
398 <0x03f50000 0x5000>,
399 <0x03e04000 0xfc000>;
406 <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
413 iommus = <&apps_smmu 0x5e0 0x0>,
414 <&apps_smmu 0x5e2 0x0>;
424 qcom,smem-states = <&ipa_smp2p_out 0>,
434 reg = <0x04080000 0x4040>;
437 <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
452 qcom,smem-states = <&modem_smp2p_out 0>;
467 reg = <0x08804000 0x1000>;
480 reg = <0x09680000 0x27200>;
487 reg = <0x0a6f8800 0x400>;
523 reg = <0x0a600000 0xcd00>;
525 iommus = <&apps_smmu 0x1a0 0x0>;
535 reg = <0x0c264000 0x1000>;
540 reg = <0xc440000 0xd00>,
541 <0xc600000 0x2000000>,
542 <0xe600000 0x100000>,
543 <0xe700000 0xa0000>,
544 <0xc40a000 0x26000>;
551 #size-cells = <0>;
552 qcom,channel = <0>;
553 qcom,ee = <0>;
558 reg = <0xf100000 0x300000>;
562 gpio-ranges = <&tlmm 0 0 109>;
570 reg = <0xb210000 0x10000>;
571 qcom,pdc-ranges = <0 147 52>, <52 266 32>;
579 reg = <0x1468f000 0x1000>;
580 ranges = <0x0 0x1468f000 0x1000>;
586 reg = <0x94c 0xc8>;
592 reg = <0x15000000 0x40000>;
635 reg = <0x17800000 0x1000>,
636 <0x17802000 0x1000>;
641 reg = <0x17808000 0x1000>;
644 #clock-cells = <0>;
649 reg = <0x17810000 0x2000>;
653 #clock-cells = <0>;
658 reg = <0x17817000 0x1000>;
667 reg = <0x17820000 0x1000>;
671 frame-number = <0>;
674 reg = <0x17821000 0x1000>,
675 <0x17822000 0x1000>;
681 reg = <0x17823000 0x1000>;
688 reg = <0x17824000 0x1000>;
695 reg = <0x17825000 0x1000>;
702 reg = <0x17826000 0x1000>;
709 reg = <0x17827000 0x1000>;
716 reg = <0x17828000 0x1000>;
723 reg = <0x17829000 0x1000>;
731 reg = <0x17830000 0x10000>,
732 <0x17840000 0x10000>;
733 reg-names = "drv-0", "drv-1";
736 qcom,tcs-offset = <0xd00>;