Lines Matching +full:0 +full:x01c00000
20 qcom,msm-id = <357 0x10000>, <368 0x10000>, <418 0x10000>;
25 reg = <0 0>;
31 #clock-cells = <0>;
38 #clock-cells = <0>;
44 #clock-cells = <0>;
51 #size-cells = <0>;
53 cpu0: cpu@0 {
56 reg = <0x0>;
108 reg = <0x8fc00000 0x80000>;
113 reg = <0x8fc80000 0x40000>;
118 reg = <0x8fcfd000 0x1000>;
123 reg = <0x8fd00000 0x100000>;
128 reg = <0x8fe00000 0x20000>;
133 reg = <0x8fe20000 0x20000>;
139 reg = <0x8fe40000 0xc0000>;
144 reg = <0x8ff00000 0x100000>;
149 reg = <0x90000000 0x500000>;
164 qcom,local-pid = <0>;
198 reg = <0x100000 0x1f0000>;
208 reg = <0x00831000 0x200>;
219 reg = <0x00ff4000 0x114>;
221 #phy-cells = <0>;
231 reg = <0x00ff6000 0x1000>;
242 #clock-cells = <0>;
243 #phy-cells = <0>;
255 reg = <0x01100000 0x400000>;
262 reg = <0x09680000 0x40000>;
269 reg = <0x0162c000 0x31200>;
276 reg = <0x01b04000 0x1c000>;
281 qcom,ee = <0>;
288 reg = <0x01b30000 0x10000>;
290 #size-cells = <0>;
295 dmas = <&qpic_bam 0>,
304 reg = <0x01c00000 0x3000>,
305 <0x40000000 0xf1d>,
306 <0x40000f20 0xc8>,
307 <0x40001000 0x1000>,
308 <0x40100000 0x100000>;
315 linux,pci-domain = <0>;
316 bus-range = <0x00 0xff>;
322 ranges = <0x01000000 0x0 0x00000000 0x40200000 0x0 0x100000>,
323 <0x02000000 0x0 0x40300000 0x40300000 0x0 0x3fd00000>;
342 interrupt-map-mask = <0 0 0 0x7>;
343 interrupt-map = <0 0 0 1 &intc 0 141 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
344 <0 0 0 2 &intc 0 142 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
345 <0 0 0 3 &intc 0 143 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
346 <0 0 0 4 &intc 0 144 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
366 iommu-map = <0x0 &apps_smmu 0x0200 0x1>,
367 <0x100 &apps_smmu 0x0201 0x1>,
368 <0x200 &apps_smmu 0x0202 0x1>,
369 <0x300 &apps_smmu 0x0203 0x1>,
370 <0x400 &apps_smmu 0x0204 0x1>;
382 pcie@0 {
384 reg = <0x0 0x0 0x0 0x0 0x0>;
385 bus-range = <0x01 0xff>;
395 reg = <0x01c00000 0x3000>,
396 <0x40000000 0xf1d>,
397 <0x40000f20 0xc8>,
398 <0x40001000 0x1000>,
399 <0x40200000 0x100000>,
400 <0x01c03000 0x3000>;
408 qcom,perst-regs = <&tcsr 0xb258 0xb270>;
446 reg = <0x01c06000 0x2000>;
462 #clock-cells = <0>;
464 #phy-cells = <0>;
478 iommus = <&apps_smmu 0x5e0 0x0>,
479 <&apps_smmu 0x5e2 0x0>;
480 reg = <0x1e40000 0x7000>,
481 <0x1e50000 0x4b20>,
482 <0x1e04000 0x2c000>;
489 <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
506 qcom,smem-states = <&ipa_smp2p_out 0>,
516 reg = <0x01f40000 0x40000>;
522 reg = <0x01fc0000 0x1000>;
527 reg = <0x08804000 0x1000>;
539 reg = <0x04080000 0x4040>;
542 <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
557 qcom,smem-states = <&modem_smp2p_out 0>;
572 reg = <0x0a6f8800 0x400>;
610 reg = <0x0a600000 0xcd00>;
612 iommus = <&apps_smmu 0x1a0 0x0>;
622 reg = <0x0b210000 0x30000>;
623 qcom,pdc-ranges = <0 179 52>;
631 reg = <0x0c264000 0x1000>;
636 reg = <0x0c440000 0x0000d00>,
637 <0x0c600000 0x2000000>,
638 <0x0e600000 0x0100000>,
639 <0x0e700000 0x00a0000>,
640 <0x0c40a000 0x0000700>;
644 qcom,ee = <0>;
645 qcom,channel = <0>;
647 #size-cells = <0>;
654 reg = <0xf100000 0x300000>;
660 gpio-ranges = <&tlmm 0 0 108>;
665 reg = <0x1468f000 0x1000>;
670 ranges = <0x0 0x1468f000 0x1000>;
674 reg = <0x94c 0x200>;
680 reg = <0x15000000 0x20000>;
707 reg = <0x17800000 0x1000>,
708 <0x17802000 0x1000>;
713 reg = <0x17808000 0x1000>;
716 #clock-cells = <0>;
721 reg = <0x17810000 0x2000>;
725 #clock-cells = <0>;
730 reg = <0x17817000 0x1000>;
739 reg = <0x17820000 0x1000>;
743 frame-number = <0>;
746 reg = <0x17821000 0x1000>,
747 <0x17822000 0x1000>;
753 reg = <0x17823000 0x1000>;
760 reg = <0x17824000 0x1000>;
767 reg = <0x17825000 0x1000>;
774 reg = <0x17826000 0x1000>;
781 reg = <0x17827000 0x1000>;
788 reg = <0x17828000 0x1000>;
795 reg = <0x17829000 0x1000>;
802 reg = <0x17830000 0x10000>, <0x17840000 0x10000>;
803 reg-names = "drv-0", "drv-1";
806 qcom,tcs-offset = <0xd00>;