Lines Matching +full:0 +full:x12140000
27 #size-cells = <0>;
29 cpu0: cpu@0 {
31 reg = <0>;
45 #clock-cells = <0>;
66 reg = <0x02040000 0x1000>;
67 arm,data-latency = <2 2 0>;
76 reg = <0x02000000 0x1000>,
77 <0x02002000 0x1000>;
86 reg = <0x0200a000 0x100>;
88 cpu-offset = <0x80000>;
94 gpio-ranges = <&msmgpio 0 0 88>;
99 reg = <0x800000 0x4000>;
106 reg = <0x900000 0x4000>;
113 reg = <0x28000000 0x1000>;
118 <0>,
119 <0>, <0>,
120 <0>, <0>,
121 <0>;
134 reg = <0x02011000 0x1000>;
139 reg = <0x1a500000 0x200>;
149 reg = <0x16100000 0x100>;
160 #size-cells = <0>;
161 reg = <0x16180000 0x1000>;
173 reg = <0x16200000 0x100>;
184 #size-cells = <0>;
185 reg = <0x16280000 0x1000>;
197 reg = <0x16300000 0x100>;
209 reg = <0x16340000 0x1000>,
210 <0x16300000 0x1000>;
221 reg = <0x16400000 0x100>;
234 #size-cells = <0>;
235 reg = <0x16480000 0x1000>;
249 reg = <0x16440000 0x1000>,
250 <0x16400000 0x1000>;
260 reg = <0x500000 0x1000>;
266 reg = <0x12182000 0x8000>;
271 qcom,ee = <0>;
276 reg = <0x12142000 0x8000>;
281 qcom,ee = <0>;
287 arm,primecell-periphid = <0x00051180>;
288 reg = <0x12180000 0x2000>;
305 arm,primecell-periphid = <0x00051180>;
307 reg = <0x12140000 0x2000>;
325 reg = <0x1a400000 0x100>;
330 reg = <0x108000 0x1000>;
332 qcom,ipc = <&l2cc 0x8 2>;