Lines Matching +full:anatop +full:- +full:reg +full:- +full:offset
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 #include "vf610-pinfunc.h"
6 #include <dt-bindings/clock/vf610-clock.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/gpio/gpio.h>
32 compatible = "fixed-clock";
33 #clock-cells = <0>;
34 clock-frequency = <24000000>;
38 compatible = "fixed-clock";
39 #clock-cells = <0>;
40 clock-frequency = <32768>;
43 reboot: syscon-reboot {
44 compatible = "syscon-reboot";
46 offset = <0x0>;
50 tempsensor: iio-hwmon {
51 compatible = "iio-hwmon";
52 io-channels = <&adc0 16>, <&adc1 16>;
56 #address-cells = <1>;
57 #size-cells = <1>;
58 compatible = "simple-bus";
59 interrupt-parent = <&mscm_ir>;
63 compatible = "fsl,aips-bus", "simple-bus";
64 #address-cells = <1>;
65 #size-cells = <1>;
66 reg = <0x40000000 0x00070000>;
70 compatible = "fsl,vf610-mscm-cpucfg", "syscon";
71 reg = <0x40001000 0x800>;
74 mscm_ir: interrupt-controller@40001800 {
75 compatible = "fsl,vf610-mscm-ir";
76 reg = <0x40001800 0x400>;
78 interrupt-controller;
79 #interrupt-cells = <2>;
82 edma0: dma-controller@40018000 {
83 #dma-cells = <2>;
84 compatible = "fsl,vf610-edma";
85 reg = <0x40018000 0x2000>,
88 dma-channels = <32>;
91 interrupt-names = "edma-tx", "edma-err";
92 clock-names = "dmamux0", "dmamux1";
99 compatible = "fsl,vf610-flexcan";
100 reg = <0x40020000 0x4000>;
104 clock-names = "ipg", "per";
109 compatible = "fsl,vf610-lpuart";
110 reg = <0x40027000 0x1000>;
113 clock-names = "ipg";
115 dma-names = "rx","tx";
120 compatible = "fsl,vf610-lpuart";
121 reg = <0x40028000 0x1000>;
124 clock-names = "ipg";
126 dma-names = "rx","tx";
131 compatible = "fsl,vf610-lpuart";
132 reg = <0x40029000 0x1000>;
135 clock-names = "ipg";
137 dma-names = "rx","tx";
142 compatible = "fsl,vf610-lpuart";
143 reg = <0x4002a000 0x1000>;
146 clock-names = "ipg";
148 dma-names = "rx","tx";
153 #address-cells = <1>;
154 #size-cells = <0>;
155 compatible = "fsl,vf610-dspi";
156 reg = <0x4002c000 0x1000>;
159 clock-names = "dspi";
160 spi-num-chipselects = <6>;
162 dma-names = "rx", "tx";
167 #address-cells = <1>;
168 #size-cells = <0>;
169 compatible = "fsl,vf610-dspi";
170 reg = <0x4002d000 0x1000>;
173 clock-names = "dspi";
174 spi-num-chipselects = <4>;
176 dma-names = "rx", "tx";
181 compatible = "fsl,vf610-sai";
182 reg = <0x4002f000 0x1000>;
187 clock-names = "bus", "mclk1", "mclk2", "mclk3";
188 dma-names = "rx", "tx";
194 compatible = "fsl,vf610-sai";
195 reg = <0x40030000 0x1000>;
200 clock-names = "bus", "mclk1", "mclk2", "mclk3";
201 dma-names = "rx", "tx";
207 compatible = "fsl,vf610-sai";
208 reg = <0x40031000 0x1000>;
213 clock-names = "bus", "mclk1", "mclk2", "mclk3";
214 dma-names = "rx", "tx";
220 compatible = "fsl,vf610-sai";
221 reg = <0x40032000 0x1000>;
226 clock-names = "bus", "mclk1", "mclk2", "mclk3";
227 dma-names = "rx", "tx";
233 compatible = "fsl,vf610-pit";
234 reg = <0x40037000 0x1000>;
237 clock-names = "pit";
241 compatible = "fsl,vf610-ftm-pwm";
242 #pwm-cells = <3>;
243 reg = <0x40038000 0x1000>;
244 clock-names = "ftm_sys", "ftm_ext",
254 compatible = "fsl,vf610-ftm-pwm";
255 #pwm-cells = <3>;
256 reg = <0x40039000 0x1000>;
257 clock-names = "ftm_sys", "ftm_ext",
267 compatible = "fsl,vf610-adc";
268 reg = <0x4003b000 0x1000>;
271 clock-names = "adc";
272 #io-channel-cells = <1>;
274 fsl,adck-max-frequency = <30000000>, <40000000>,
278 tcon0: timing-controller@4003d000 {
279 compatible = "fsl,vf610-tcon";
280 reg = <0x4003d000 0x1000>;
282 clock-names = "ipg";
287 compatible = "fsl,vf610-wdt", "fsl,imx21-wdt";
288 reg = <0x4003e000 0x1000>;
295 #address-cells = <1>;
296 #size-cells = <0>;
297 compatible = "fsl,vf610-qspi";
298 reg = <0x40044000 0x1000>, <0x20000000 0x10000000>;
299 reg-names = "QuadSPI", "QuadSPI-memory";
303 clock-names = "qspi_en", "qspi";
308 compatible = "fsl,vf610-iomuxc";
309 reg = <0x40048000 0x1000>;
313 compatible = "fsl,vf610-gpio";
314 reg = <0x40049000 0x1000 0x400ff000 0x40>;
315 gpio-controller;
316 #gpio-cells = <2>;
318 interrupt-controller;
319 #interrupt-cells = <2>;
320 gpio-ranges = <&iomuxc 0 0 32>;
324 compatible = "fsl,vf610-gpio";
325 reg = <0x4004a000 0x1000 0x400ff040 0x40>;
326 gpio-controller;
327 #gpio-cells = <2>;
329 interrupt-controller;
330 #interrupt-cells = <2>;
331 gpio-ranges = <&iomuxc 0 32 32>;
335 compatible = "fsl,vf610-gpio";
336 reg = <0x4004b000 0x1000 0x400ff080 0x40>;
337 gpio-controller;
338 #gpio-cells = <2>;
340 interrupt-controller;
341 #interrupt-cells = <2>;
342 gpio-ranges = <&iomuxc 0 64 32>;
346 compatible = "fsl,vf610-gpio";
347 reg = <0x4004c000 0x1000 0x400ff0c0 0x40>;
348 gpio-controller;
349 #gpio-cells = <2>;
351 interrupt-controller;
352 #interrupt-cells = <2>;
353 gpio-ranges = <&iomuxc 0 96 32>;
357 compatible = "fsl,vf610-gpio";
358 reg = <0x4004d000 0x1000 0x400ff100 0x40>;
359 gpio-controller;
360 #gpio-cells = <2>;
362 interrupt-controller;
363 #interrupt-cells = <2>;
364 gpio-ranges = <&iomuxc 0 128 7>;
367 anatop: anatop@40050000 { label
368 compatible = "fsl,vf610-anatop", "syscon";
369 reg = <0x40050000 0x400>;
373 compatible = "fsl,vf610-usbphy";
374 reg = <0x40050800 0x400>;
377 fsl,anatop = <&anatop>;
382 compatible = "fsl,vf610-usbphy";
383 reg = <0x40050c00 0x400>;
386 fsl,anatop = <&anatop>;
391 compatible = "fsl,vf610-dcu";
392 reg = <0x40058000 0x1200>;
396 clock-names = "dcu", "pix";
402 #address-cells = <1>;
403 #size-cells = <0>;
404 compatible = "fsl,vf610-i2c";
405 reg = <0x40066000 0x1000>;
408 clock-names = "ipg";
411 dma-names = "rx","tx";
416 #address-cells = <1>;
417 #size-cells = <0>;
418 compatible = "fsl,vf610-i2c";
419 reg = <0x40067000 0x1000>;
422 clock-names = "ipg";
424 dma-names = "rx","tx";
429 compatible = "fsl,vf610-ccm";
430 reg = <0x4006b000 0x1000>;
432 clock-names = "sxosc", "fxosc";
433 #clock-cells = <1>;
437 compatible = "fsl,vf610-usb", "fsl,imx27-usb";
438 reg = <0x40034000 0x800>;
448 #index-cells = <1>;
449 compatible = "fsl,vf610-usbmisc";
450 reg = <0x40034800 0x200>;
456 compatible = "fsl,vf610-src", "syscon";
457 reg = <0x4006e000 0x1000>;
463 compatible = "fsl,aips-bus", "simple-bus";
464 #address-cells = <1>;
465 #size-cells = <1>;
466 reg = <0x40080000 0x0007f000>;
469 edma1: dma-controller@40098000 {
470 #dma-cells = <2>;
471 compatible = "fsl,vf610-edma";
472 reg = <0x40098000 0x2000>,
475 dma-channels = <32>;
478 interrupt-names = "edma-tx", "edma-err";
479 clock-names = "dmamux0", "dmamux1";
486 compatible = "fsl,vf610-ocotp", "syscon";
487 reg = <0x400a5000 0x1000>;
492 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
493 reg = <0x400a7000 0x2000>;
495 snvsrtc: snvs-rtc-lp {
496 compatible = "fsl,sec-v4.0-mon-rtc-lp";
498 offset = <0x34>;
501 clock-names = "snvs-rtc";
506 compatible = "fsl,vf610-lpuart";
507 reg = <0x400a9000 0x1000>;
510 clock-names = "ipg";
515 compatible = "fsl,vf610-lpuart";
516 reg = <0x400aa000 0x1000>;
519 clock-names = "ipg";
524 #address-cells = <1>;
525 #size-cells = <0>;
526 compatible = "fsl,vf610-dspi";
527 reg = <0x400ac000 0x1000>;
530 clock-names = "dspi";
531 spi-num-chipselects = <2>;
534 dma-names = "rx", "tx";
539 #address-cells = <1>;
540 #size-cells = <0>;
541 compatible = "fsl,vf610-dspi";
542 reg = <0x400ad000 0x1000>;
545 clock-names = "dspi";
546 spi-num-chipselects = <2>;
548 dma-names = "rx", "tx";
553 compatible = "fsl,vf610-adc";
554 reg = <0x400bb000 0x1000>;
557 clock-names = "adc";
558 #io-channel-cells = <1>;
560 fsl,adck-max-frequency = <30000000>, <40000000>,
565 compatible = "fsl,imx53-esdhc";
566 reg = <0x400b1000 0x1000>;
571 clock-names = "ipg", "ahb", "per";
576 compatible = "fsl,imx53-esdhc";
577 reg = <0x400b2000 0x1000>;
582 clock-names = "ipg", "ahb", "per";
587 compatible = "fsl,vf610-usb", "fsl,imx27-usb";
588 reg = <0x400b4000 0x800>;
598 #index-cells = <1>;
599 compatible = "fsl,vf610-usbmisc";
600 reg = <0x400b4800 0x200>;
606 compatible = "fsl,ftm-timer";
607 reg = <0x400b8000 0x1000 0x400b9000 0x1000>;
609 clock-names = "ftm-evt", "ftm-src",
610 "ftm-evt-counter-en", "ftm-src-counter-en";
619 #address-cells = <1>;
620 #size-cells = <0>;
621 compatible = "fsl,vf610-qspi";
622 reg = <0x400c4000 0x1000>, <0x50000000 0x10000000>;
623 reg-names = "QuadSPI", "QuadSPI-memory";
627 clock-names = "qspi_en", "qspi";
632 compatible = "fsl,vf610-dac";
633 reg = <0x400cc000 1000>;
635 clock-names = "dac";
641 compatible = "fsl,vf610-dac";
642 reg = <0x400cd000 1000>;
644 clock-names = "dac";
650 compatible = "fsl,mvf600-fec";
651 reg = <0x400d0000 0x1000>;
656 clock-names = "ipg", "ahb", "ptp";
661 compatible = "fsl,mvf600-fec";
662 reg = <0x400d1000 0x1000>;
667 clock-names = "ipg", "ahb", "ptp";
672 compatible = "fsl,vf610-flexcan";
673 reg = <0x400d4000 0x4000>;
677 clock-names = "ipg", "per";
682 #address-cells = <1>;
683 #size-cells = <0>;
684 compatible = "fsl,vf610-nfc";
685 reg = <0x400e0000 0x4000>;
688 clock-names = "nfc";
693 #address-cells = <1>;
694 #size-cells = <0>;
695 compatible = "fsl,vf610-i2c";
696 reg = <0x400e6000 0x1000>;
699 clock-names = "ipg";
702 dma-names = "rx","tx";
707 #address-cells = <1>;
708 #size-cells = <0>;
709 compatible = "fsl,vf610-i2c";
710 reg = <0x400e7000 0x1000>;
713 clock-names = "ipg";
715 dma-names = "rx","tx";
720 compatible = "fsl,sec-v4.0";
721 #address-cells = <1>;
722 #size-cells = <1>;
723 reg = <0x400f0000 0x9000>;
726 clock-names = "ipg";
729 compatible = "fsl,sec-v4.0-job-ring";
730 reg = <0x1000 0x1000>;
735 compatible = "fsl,sec-v4.0-job-ring";
736 reg = <0x2000 0x1000>;