Lines Matching +full:pinctrl +full:- +full:0
1 // SPDX-License-Identifier: GPL-2.0 OR X11
6 /dts-v1/;
12 compatible = "boundary,imx6sx-nitrogen6sx", "fsl,imx6sx";
16 reg = <0x80000000 0x40000000>;
19 backlight-lvds {
20 compatible = "pwm-backlight";
21 pwms = <&pwm4 0 5000000 0>;
22 brightness-levels = <0 4 8 16 32 64 128 255>;
23 default-brightness-level = <6>;
24 power-supply = <®_3p3v>;
27 reg_1p8v: regulator-1p8v {
28 compatible = "regulator-fixed";
29 regulator-name = "1P8V";
30 regulator-min-microvolt = <1800000>;
31 regulator-max-microvolt = <1800000>;
32 regulator-always-on;
35 reg_3p3v: regulator-3p3v {
36 compatible = "regulator-fixed";
37 regulator-name = "3P3V";
38 regulator-min-microvolt = <3300000>;
39 regulator-max-microvolt = <3300000>;
40 regulator-always-on;
43 reg_can1_3v3: regulator-can1-3v3 {
44 compatible = "regulator-fixed";
45 regulator-name = "can1-3v3";
46 regulator-min-microvolt = <3300000>;
47 regulator-max-microvolt = <3300000>;
51 reg_can2_3v3: regulator-can2-3v3 {
52 compatible = "regulator-fixed";
53 regulator-name = "can2-3v3";
54 regulator-min-microvolt = <3300000>;
55 regulator-max-microvolt = <3300000>;
59 reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
60 pinctrl-names = "default";
61 pinctrl-0 = <&pinctrl_usbotg1_vbus>;
62 compatible = "regulator-fixed";
63 regulator-name = "usb_otg1_vbus";
64 regulator-min-microvolt = <5000000>;
65 regulator-max-microvolt = <5000000>;
67 enable-active-high;
70 reg_wlan: regulator-wlan {
71 pinctrl-names = "default";
72 pinctrl-0 = <&pinctrl_reg_wlan>;
73 compatible = "regulator-fixed";
75 regulator-name = "wlan-en";
76 regulator-min-microvolt = <3300000>;
77 regulator-max-microvolt = <3300000>;
78 startup-delay-us = <70000>;
80 enable-active-high;
84 compatible = "fsl,imx-audio-sgtl5000";
85 model = "imx6sx-nitrogen6sx-sgtl5000";
86 ssi-controller = <&ssi1>;
87 audio-codec = <&codec>;
88 audio-routing =
92 mux-int-port = <1>;
93 mux-ext-port = <5>;
98 pinctrl-names = "default";
99 pinctrl-0 = <&pinctrl_audmux>;
104 cs-gpios = <&gpio2 16 GPIO_ACTIVE_LOW>;
105 pinctrl-names = "default";
106 pinctrl-0 = <&pinctrl_ecspi1>;
109 flash: flash@0 {
111 spi-max-frequency = <20000000>;
112 reg = <0>;
113 #address-cells = <1>;
114 #size-cells = <1>;
116 partition@0 {
117 label = "U-Boot";
118 reg = <0x0 0xc0000>;
119 read-only;
124 reg = <0xc0000 0x2000>;
125 read-only;
130 reg = <0xc2000 0x11e000>;
135 reg = <0x1e0000 0x20000>;
141 pinctrl-names = "default";
142 pinctrl-0 = <&pinctrl_enet1>;
143 phy-mode = "rgmii";
144 phy-handle = <ðphy1>;
145 phy-supply = <®_3p3v>;
146 fsl,magic-packet;
150 #address-cells = <1>;
151 #size-cells = <0>;
153 ethphy1: ethernet-phy@4 {
157 ethphy2: ethernet-phy@5 {
164 pinctrl-names = "default";
165 pinctrl-0 = <&pinctrl_enet2>;
166 phy-mode = "rgmii";
167 phy-handle = <ðphy2>;
168 phy-supply = <®_3p3v>;
169 fsl,magic-packet;
174 pinctrl-names = "default";
175 pinctrl-0 = <&pinctrl_flexcan1>;
176 xceiver-supply = <®_can1_3v3>;
181 pinctrl-names = "default";
182 pinctrl-0 = <&pinctrl_flexcan2>;
183 xceiver-supply = <®_can2_3v3>;
188 clock-frequency = <100000>;
189 pinctrl-names = "default";
190 pinctrl-0 = <&pinctrl_i2c1>;
195 pinctrl-names = "default";
196 pinctrl-0 = <&pinctrl_sgtl5000>;
197 reg = <0x0a>;
198 #sound-dai-cells = <0>;
200 VDDA-supply = <®_1p8v>;
201 VDDIO-supply = <®_1p8v>;
202 VDDD-supply = <®_1p8v>;
203 assigned-clocks = <&clks IMX6SX_CLK_CKO2_SEL>,
205 assigned-clock-parents = <&clks IMX6SX_CLK_OSC>;
206 assigned-clock-rates = <0>, <24000000>;
211 clock-frequency = <100000>;
212 pinctrl-names = "default";
213 pinctrl-0 = <&pinctrl_i2c2>;
218 clock-frequency = <100000>;
219 pinctrl-names = "default";
220 pinctrl-0 = <&pinctrl_i2c3>;
225 pinctrl-names = "default";
226 pinctrl-0 = <&pinctrl_pcie>;
227 reset-gpio = <&gpio4 10 GPIO_ACTIVE_LOW>;
232 pinctrl-names = "default";
233 pinctrl-0 = <&pinctrl_pwm4>;
241 pinctrl-names = "default";
242 pinctrl-0 = <&pinctrl_uart1>;
247 pinctrl-names = "default";
248 pinctrl-0 = <&pinctrl_uart2>;
253 pinctrl-names = "default";
254 pinctrl-0 = <&pinctrl_uart3>;
255 uart-has-rtscts;
260 pinctrl-names = "default";
261 pinctrl-0 = <&pinctrl_uart5>;
266 vbus-supply = <®_usb_otg1_vbus>;
267 pinctrl-names = "default";
268 pinctrl-0 = <&pinctrl_usbotg1>;
273 pinctrl-names = "default";
274 pinctrl-0 = <&pinctrl_usbotg2>;
276 disable-over-current;
277 reset-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
282 pinctrl-names = "default";
283 pinctrl-0 = <&pinctrl_usdhc2>;
284 bus-width = <4>;
285 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
286 keep-power-in-suspend;
287 wakeup-source;
292 #address-cells = <1>;
293 #size-cells = <0>;
294 pinctrl-names = "default";
295 pinctrl-0 = <&pinctrl_usdhc3>;
296 bus-width = <4>;
297 non-removable;
298 keep-power-in-suspend;
299 vmmc-supply = <®_wlan>;
300 cap-power-off-card;
301 cap-sdio-irq;
306 compatible = "brcm,bcm4329-fmac";
307 interrupt-parent = <&gpio7>;
314 interrupt-parent = <&gpio7>;
316 ref-clock-frequency = <38400000>;
321 pinctrl-names = "default", "state_100mhz", "state_200mhz";
322 pinctrl-0 = <&pinctrl_usdhc4_50mhz>;
323 pinctrl-1 = <&pinctrl_usdhc4_100mhz>;
324 pinctrl-2 = <&pinctrl_usdhc4_200mhz>;
325 bus-width = <8>;
326 non-removable;
327 vmmc-supply = <®_1p8v>;
328 keep-power-in-suspend;
333 pinctrl-names = "default";
334 pinctrl-0 = <&pinctrl_hog>;
338 MX6SX_PAD_SD1_DATA0__AUDMUX_AUD5_RXD 0x1b0b0
339 MX6SX_PAD_SD1_DATA1__AUDMUX_AUD5_TXC 0x1b0b0
340 MX6SX_PAD_SD1_DATA2__AUDMUX_AUD5_TXFS 0x1b0b0
341 MX6SX_PAD_SD1_DATA3__AUDMUX_AUD5_TXD 0x1b0b0
347 MX6SX_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
348 MX6SX_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
349 MX6SX_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
350 MX6SX_PAD_KEY_ROW1__GPIO2_IO_16 0x0b0b1
356 MX6SX_PAD_ENET1_MDIO__ENET1_MDIO 0x1b0b0
357 MX6SX_PAD_ENET1_MDC__ENET1_MDC 0x1b0b0
358 MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0 0x30b1
359 MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1 0x30b1
360 MX6SX_PAD_RGMII1_TD2__ENET1_TX_DATA_2 0x30b1
361 MX6SX_PAD_RGMII1_TD3__ENET1_TX_DATA_3 0x30b1
362 MX6SX_PAD_RGMII1_TXC__ENET1_RGMII_TXC 0x30b1
363 MX6SX_PAD_RGMII1_TX_CTL__ENET1_TX_EN 0x30b1
364 MX6SX_PAD_RGMII1_RD0__ENET1_RX_DATA_0 0x3081
365 MX6SX_PAD_RGMII1_RD1__ENET1_RX_DATA_1 0x3081
366 MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN 0x3081
367 MX6SX_PAD_RGMII1_RD2__ENET1_RX_DATA_2 0x3081
368 MX6SX_PAD_RGMII1_RD3__ENET1_RX_DATA_3 0x3081
369 MX6SX_PAD_RGMII1_RXC__ENET1_RX_CLK 0x3081
370 MX6SX_PAD_ENET2_CRS__GPIO2_IO_7 0xb0b0
371 MX6SX_PAD_ENET1_RX_CLK__GPIO2_IO_4 0xb0b0
372 MX6SX_PAD_ENET1_TX_CLK__GPIO2_IO_5 0xb0b0
378 MX6SX_PAD_RGMII2_TD0__ENET2_TX_DATA_0 0x30b1
379 MX6SX_PAD_RGMII2_TD1__ENET2_TX_DATA_1 0x30b1
380 MX6SX_PAD_RGMII2_TD2__ENET2_TX_DATA_2 0x30b1
381 MX6SX_PAD_RGMII2_TD3__ENET2_TX_DATA_3 0x30b1
382 MX6SX_PAD_RGMII2_TXC__ENET2_RGMII_TXC 0x30b1
383 MX6SX_PAD_RGMII2_TX_CTL__ENET2_TX_EN 0x30b1
384 MX6SX_PAD_RGMII2_RD0__ENET2_RX_DATA_0 0x3081
385 MX6SX_PAD_RGMII2_RD1__ENET2_RX_DATA_1 0x3081
386 MX6SX_PAD_RGMII2_RX_CTL__ENET2_RX_EN 0x3081
387 MX6SX_PAD_RGMII2_RD2__ENET2_RX_DATA_2 0x3081
388 MX6SX_PAD_RGMII2_RD3__ENET2_RX_DATA_3 0x3081
389 MX6SX_PAD_RGMII2_RXC__ENET2_RX_CLK 0x3081
390 MX6SX_PAD_ENET2_COL__GPIO2_IO_6 0xb0b0
391 MX6SX_PAD_ENET2_RX_CLK__GPIO2_IO_8 0xb0b0
392 MX6SX_PAD_ENET2_TX_CLK__GPIO2_IO_9 0xb0b0
398 MX6SX_PAD_QSPI1B_DQS__CAN1_TX 0x1b0b0
399 MX6SX_PAD_QSPI1A_SS1_B__CAN1_RX 0x1b0b0
400 MX6SX_PAD_QSPI1B_DATA3__GPIO4_IO_27 0x1b0b0
401 MX6SX_PAD_QSPI1B_DATA3__GPIO4_IO_27 0x0b0b0
407 MX6SX_PAD_QSPI1A_DQS__CAN2_TX 0x1b0b0
408 MX6SX_PAD_QSPI1B_SS1_B__CAN2_RX 0x1b0b0
409 MX6SX_PAD_QSPI1B_DATA0__GPIO4_IO_24 0x0b0b0
415 MX6SX_PAD_NAND_CE0_B__GPIO4_IO_1 0x1b0b0
416 MX6SX_PAD_NAND_CLE__GPIO4_IO_3 0x1b0b0
417 MX6SX_PAD_NAND_RE_B__GPIO4_IO_12 0x1b0b0
418 MX6SX_PAD_NAND_WE_B__GPIO4_IO_14 0x1b0b0
419 MX6SX_PAD_NAND_WP_B__GPIO4_IO_15 0x1b0b0
420 MX6SX_PAD_NAND_READY_B__GPIO4_IO_13 0x1b0b0
421 MX6SX_PAD_QSPI1A_DATA0__GPIO4_IO_16 0x1b0b0
422 MX6SX_PAD_QSPI1A_DATA1__GPIO4_IO_17 0x1b0b0
423 MX6SX_PAD_QSPI1A_DATA2__GPIO4_IO_18 0x1b0b0
424 MX6SX_PAD_QSPI1A_DATA3__GPIO4_IO_19 0x1b0b0
425 MX6SX_PAD_SD1_CMD__CCM_CLKO1 0x000b0
426 MX6SX_PAD_SD3_DATA5__GPIO7_IO_7 0x1b0b0
428 MX6SX_PAD_NAND_DATA04__GPIO4_IO_8 0x1b0b0
429 MX6SX_PAD_QSPI1B_DATA1__GPIO4_IO_25 0x1b0b0
435 MX6SX_PAD_GPIO1_IO00__I2C1_SCL 0x4001b8b1
436 MX6SX_PAD_GPIO1_IO01__I2C1_SDA 0x4001b8b1
442 MX6SX_PAD_GPIO1_IO02__I2C2_SCL 0x4001b8b1
443 MX6SX_PAD_GPIO1_IO03__I2C2_SDA 0x4001b8b1
449 MX6SX_PAD_KEY_COL4__I2C3_SCL 0x4001b8b1
450 MX6SX_PAD_KEY_ROW4__I2C3_SDA 0x4001b8b1
456 MX6SX_PAD_NAND_DATA05__GPIO4_IO_9 0xb0b0
457 MX6SX_PAD_NAND_DATA06__GPIO4_IO_10 0xb0b0
458 MX6SX_PAD_NAND_DATA07__GPIO4_IO_11 0xb0b0
464 MX6SX_PAD_GPIO1_IO13__PWM4_OUT 0x110b0
468 pinctrl_reg_wlan: reg-wlangrp {
470 MX6SX_PAD_SD3_DATA4__GPIO7_IO_6 0x1b0b0
471 MX6SX_PAD_GPIO1_IO11__CCM_CLKO1 0x000b0
477 MX6SX_PAD_GPIO1_IO12__CCM_CLKO2 0x000b0
478 MX6SX_PAD_ENET1_COL__GPIO2_IO_0 0x1b0b0
479 MX6SX_PAD_ENET1_CRS__GPIO2_IO_1 0x1b0b0
480 MX6SX_PAD_QSPI1A_SS0_B__GPIO4_IO_22 0xb0b0
486 MX6SX_PAD_GPIO1_IO04__UART1_DCE_TX 0x1b0b1
487 MX6SX_PAD_GPIO1_IO05__UART1_DCE_RX 0x1b0b1
493 MX6SX_PAD_GPIO1_IO06__UART2_DCE_TX 0x1b0b1
494 MX6SX_PAD_GPIO1_IO07__UART2_DCE_RX 0x1b0b1
500 MX6SX_PAD_QSPI1B_SS0_B__UART3_DCE_TX 0x1b0b1
501 MX6SX_PAD_QSPI1B_SCLK__UART3_DCE_RX 0x1b0b1
507 MX6SX_PAD_KEY_COL3__UART5_DCE_TX 0x1b0b1
508 MX6SX_PAD_KEY_ROW3__UART5_DCE_RX 0x1b0b1
509 MX6SX_PAD_SD3_DATA6__UART3_DCE_RTS 0x1b0b1
510 MX6SX_PAD_SD3_DATA7__UART3_DCE_CTS 0x1b0b1
516 MX6SX_PAD_GPIO1_IO08__USB_OTG1_OC 0x1b0b0
517 MX6SX_PAD_GPIO1_IO10__ANATOP_OTG1_ID 0x170b1
521 pinctrl_usbotg1_vbus: usbotg1-vbusgrp {
523 MX6SX_PAD_GPIO1_IO09__GPIO1_IO_9 0x1b0b0
529 MX6SX_PAD_QSPI1B_DATA2__GPIO4_IO_26 0xb0b0
535 MX6SX_PAD_SD2_CMD__USDHC2_CMD 0x17059
536 MX6SX_PAD_SD2_CLK__USDHC2_CLK 0x10059
537 MX6SX_PAD_SD2_DATA0__USDHC2_DATA0 0x17059
538 MX6SX_PAD_SD2_DATA1__USDHC2_DATA1 0x17059
539 MX6SX_PAD_SD2_DATA2__USDHC2_DATA2 0x17059
540 MX6SX_PAD_SD2_DATA3__USDHC2_DATA3 0x17059
541 MX6SX_PAD_KEY_COL2__GPIO2_IO_12 0x1b0b0
547 MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x10071
548 MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x17071
549 MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x17071
550 MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x17071
551 MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x17071
552 MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x17071
556 pinctrl_usdhc4_50mhz: usdhc4-50mhzgrp {
558 MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x10071
559 MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x17071
560 MX6SX_PAD_SD4_RESET_B__USDHC4_RESET_B 0x17071
561 MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x17071
562 MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x17071
563 MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x17071
564 MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x17071
565 MX6SX_PAD_SD4_DATA4__USDHC4_DATA4 0x17071
566 MX6SX_PAD_SD4_DATA5__USDHC4_DATA5 0x17071
567 MX6SX_PAD_SD4_DATA6__USDHC4_DATA6 0x17071
568 MX6SX_PAD_SD4_DATA7__USDHC4_DATA7 0x17071
572 pinctrl_usdhc4_100mhz: usdhc4-100mhzgrp {
574 MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x100b9
575 MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x170b9
576 MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x170b9
577 MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x170b9
578 MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x170b9
579 MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x170b9
580 MX6SX_PAD_SD4_DATA4__USDHC4_DATA4 0x170b9
581 MX6SX_PAD_SD4_DATA5__USDHC4_DATA5 0x170b9
582 MX6SX_PAD_SD4_DATA6__USDHC4_DATA6 0x170b9
583 MX6SX_PAD_SD4_DATA7__USDHC4_DATA7 0x170b9
587 pinctrl_usdhc4_200mhz: usdhc4-200mhzgrp {
589 MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x100f9
590 MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x170f9
591 MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x170f9
592 MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x170f9
593 MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x170f9
594 MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x170f9
595 MX6SX_PAD_SD4_DATA4__USDHC4_DATA4 0x170f9
596 MX6SX_PAD_SD4_DATA5__USDHC4_DATA5 0x170f9
597 MX6SX_PAD_SD4_DATA6__USDHC4_DATA6 0x170f9
598 MX6SX_PAD_SD4_DATA7__USDHC4_DATA7 0x170f9