Lines Matching +full:0 +full:x1f4
55 reg = <0x70000000 0>;
69 clock-frequency = <0>;
75 #clock-cells = <0>;
82 pinctrl-0 = <&pinctrl_gpio_key>;
95 pinctrl-0 = <&pinctrl_stk5led>;
124 pinctrl-0 = <&pinctrl_can_xcvr>;
134 pinctrl-0 = <&pinctrl_usbh1_vbus>;
145 pinctrl-0 = <&pinctrl_usbotg_vbus>;
167 pinctrl-0 = <&pinctrl_ssi1>;
173 pinctrl-0 = <&pinctrl_can1>;
180 pinctrl-0 = <&pinctrl_can2>;
187 pinctrl-0 = <&pinctrl_ecspi1>;
201 pinctrl-0 = <&pinctrl_esdhc1>;
209 pinctrl-0 = <&pinctrl_esdhc2>;
215 pinctrl-0 = <&pinctrl_fec>;
224 #size-cells = <0>;
226 phy0: ethernet-phy@0 {
227 reg = <0>;
237 pinctrl-0 = <&pinctrl_i2c1>;
238 pinctrl-0 = <&pinctrl_i2c1_gpio>;
246 reg = <0x68>;
248 pinctrl-0 = <&pinctrl_ds1339>;
258 pinctrl-0 = <&pinctrl_hog>;
265 MX53_PAD_CSI0_DAT12__GPIO5_30 0x1f4
266 MX53_PAD_CSI0_DAT13__GPIO5_31 0x1f4
267 MX53_PAD_CSI0_DAT14__GPIO6_0 0x1f4
268 MX53_PAD_CSI0_DAT15__GPIO6_1 0x1f4
269 MX53_PAD_CSI0_DAT16__GPIO6_2 0x1f4
270 MX53_PAD_CSI0_DAT17__GPIO6_3 0x1f4
271 MX53_PAD_CSI0_DAT18__GPIO6_4 0x1f4
272 MX53_PAD_CSI0_DAT19__GPIO6_5 0x1f4
273 MX53_PAD_CSI0_MCLK__GPIO5_19 0x1f4
274 MX53_PAD_CSI0_VSYNC__GPIO5_21 0x1f4
275 MX53_PAD_CSI0_PIXCLK__GPIO5_18 0x1f4
276 MX53_PAD_GPIO_0__GPIO1_0 0x1f4
278 /* MX53_PAD_NANDF_CS2__GPIO6_15 0x1f4 maybe used by EDT-FT5x06 */
279 /* MX53_PAD_EIM_A16__GPIO2_22 0x1f4 maybe used by EDT-FT5x06 */
280 MX53_PAD_EIM_D29__GPIO3_29 0x1f4
281 MX53_PAD_EIM_EB3__GPIO2_31 0x1f4
282 /* MX53_PAD_EIM_A17__GPIO2_21 0x1f4 maybe used by EDT-FT5x06 */
283 /* MX53_PAD_EIM_A18__GPIO2_20 0x1f4 used by LED */
284 MX53_PAD_EIM_A19__GPIO2_19 0x1f4
285 MX53_PAD_EIM_A20__GPIO2_18 0x1f4
286 MX53_PAD_EIM_A21__GPIO2_17 0x1f4
287 MX53_PAD_EIM_A22__GPIO2_16 0x1f4
288 MX53_PAD_EIM_A23__GPIO6_6 0x1f4
289 MX53_PAD_EIM_A24__GPIO5_4 0x1f4
290 MX53_PAD_CSI0_DAT8__GPIO5_26 0x1f4
291 MX53_PAD_CSI0_DAT9__GPIO5_27 0x1f4
292 MX53_PAD_CSI0_DAT10__GPIO5_28 0x1f4
293 MX53_PAD_CSI0_DAT11__GPIO5_29 0x1f4
294 /* MX53_PAD_EIM_D22__GPIO3_22 0x1f4 maybe used by EETI touchpanel driver */
295 /* MX53_PAD_EIM_D23__GPIO3_23 0x1f4 maybe used by EETI touchpanel driver */
296 MX53_PAD_GPIO_13__GPIO4_3 0x1f4
297 MX53_PAD_EIM_CS0__GPIO2_23 0x1f4
298 MX53_PAD_EIM_CS1__GPIO2_24 0x1f4
299 MX53_PAD_CSI0_DATA_EN__GPIO5_20 0x1f4
300 MX53_PAD_EIM_WAIT__GPIO5_0 0x1f4
301 MX53_PAD_EIM_EB0__GPIO2_28 0x1f4
302 MX53_PAD_EIM_EB1__GPIO2_29 0x1f4
303 MX53_PAD_EIM_OE__GPIO2_25 0x1f4
304 MX53_PAD_EIM_LBA__GPIO2_27 0x1f4
305 MX53_PAD_EIM_RW__GPIO2_26 0x1f4
306 MX53_PAD_EIM_DA8__GPIO3_8 0x1f4
307 MX53_PAD_EIM_DA9__GPIO3_9 0x1f4
308 MX53_PAD_EIM_DA10__GPIO3_10 0x1f4
309 MX53_PAD_EIM_DA11__GPIO3_11 0x1f4
310 MX53_PAD_EIM_DA12__GPIO3_12 0x1f4
311 MX53_PAD_EIM_DA13__GPIO3_13 0x1f4
312 MX53_PAD_EIM_DA14__GPIO3_14 0x1f4
313 MX53_PAD_EIM_DA15__GPIO3_15 0x1f4
319 MX53_PAD_GPIO_7__CAN1_TXCAN 0x80000000
320 MX53_PAD_GPIO_8__CAN1_RXCAN 0x80000000
326 MX53_PAD_KEY_COL4__CAN2_TXCAN 0x80000000
327 MX53_PAD_KEY_ROW4__CAN2_RXCAN 0x80000000
332 fsl,pins = <MX53_PAD_DISP0_DAT0__GPIO4_21 0xe0>; /* Flexcan XCVR enable */
336 fsl,pins = <MX53_PAD_DI0_PIN4__GPIO4_20 0xe0>;
341 MX53_PAD_GPIO_19__ECSPI1_RDY 0x80000000
342 MX53_PAD_EIM_EB2__ECSPI1_SS0 0x80000000
343 MX53_PAD_EIM_D16__ECSPI1_SCLK 0x80000000
344 MX53_PAD_EIM_D17__ECSPI1_MISO 0x80000000
345 MX53_PAD_EIM_D18__ECSPI1_MOSI 0x80000000
346 MX53_PAD_EIM_D19__ECSPI1_SS1 0x80000000
352 MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
353 MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
354 MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
355 MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
356 MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5
357 MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5
358 MX53_PAD_EIM_D24__GPIO3_24 0x1f0
364 MX53_PAD_SD2_CMD__ESDHC2_CMD 0x1d5
365 MX53_PAD_SD2_CLK__ESDHC2_CLK 0x1d5
366 MX53_PAD_SD2_DATA0__ESDHC2_DAT0 0x1d5
367 MX53_PAD_SD2_DATA1__ESDHC2_DAT1 0x1d5
368 MX53_PAD_SD2_DATA2__ESDHC2_DAT2 0x1d5
369 MX53_PAD_SD2_DATA3__ESDHC2_DAT3 0x1d5
370 MX53_PAD_EIM_D25__GPIO3_25 0x1f0
376 MX53_PAD_FEC_MDC__FEC_MDC 0x80000000
377 MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000
378 MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000
379 MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000
380 MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000
381 MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000
382 MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000
383 MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000
384 MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000
385 MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000
390 fsl,pins = <MX53_PAD_EIM_A25__GPIO5_2 0x1f4>;
395 MX53_PAD_EIM_D21__I2C1_SCL 0x400001e4
396 MX53_PAD_EIM_D28__I2C1_SDA 0x400001e4
402 MX53_PAD_EIM_D21__GPIO3_21 0x400001e6
403 MX53_PAD_EIM_D28__GPIO3_28 0x400001e6
409 MX53_PAD_GPIO_3__I2C3_SCL 0x400001e4
410 MX53_PAD_GPIO_6__I2C3_SDA 0x400001e4
416 MX53_PAD_GPIO_3__GPIO1_3 0x400001e6
417 MX53_PAD_GPIO_6__GPIO1_6 0x400001e6
423 MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B 0x4
424 MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B 0x4
425 MX53_PAD_NANDF_CLE__EMI_NANDF_CLE 0x4
426 MX53_PAD_NANDF_ALE__EMI_NANDF_ALE 0x4
427 MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B 0xe0
428 MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0 0xe0
429 MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0 0x4
430 MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 0xa4
431 MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 0xa4
432 MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 0xa4
433 MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 0xa4
434 MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 0xa4
435 MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 0xa4
436 MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 0xa4
437 MX53_PAD_EIM_DA7__EMI_NAND_WEIM_DA_7 0xa4
443 MX53_PAD_GPIO_1__PWM2_PWMO 0x80000000
449 MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC 0x80000000
450 MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD 0x80000000
451 MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS 0x80000000
452 MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD 0x80000000
458 MX53_PAD_CSI0_DAT4__AUDMUX_AUD3_TXC 0x80000000
459 MX53_PAD_CSI0_DAT5__AUDMUX_AUD3_TXD 0x80000000
460 MX53_PAD_CSI0_DAT6__AUDMUX_AUD3_TXFS 0x80000000
461 MX53_PAD_CSI0_DAT7__AUDMUX_AUD3_RXD 0x80000000
462 MX53_PAD_EIM_D27__GPIO3_27 0x1f0
467 fsl,pins = <MX53_PAD_EIM_A18__GPIO2_20 0xc0>;
472 MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4
473 MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4
474 MX53_PAD_PATA_RESET_B__UART1_CTS 0x1c5
475 MX53_PAD_PATA_IORDY__UART1_RTS 0x1c5
481 MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1c5
482 MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1c5
483 MX53_PAD_PATA_DIOR__UART2_RTS 0x1c5
484 MX53_PAD_PATA_INTRQ__UART2_CTS 0x1c5
490 MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4
491 MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4
492 MX53_PAD_PATA_DA_1__UART3_CTS 0x1e4
493 MX53_PAD_PATA_DA_2__UART3_RTS 0x1e4
499 MX53_PAD_EIM_D30__GPIO3_30 0x100 /* OC */
505 MX53_PAD_EIM_D31__GPIO3_31 0xe0 /* VBUS ENABLE */
511 MX53_PAD_GPIO_7__GPIO1_7 0xe0 /* VBUS ENABLE */
512 MX53_PAD_GPIO_8__GPIO1_8 0x100 /* OC */
524 pinctrl-0 = <&pinctrl_nand>;
533 pinctrl-0 = <&pinctrl_pwm2>;
550 pinctrl-0 = <&pinctrl_uart1>;
557 pinctrl-0 = <&pinctrl_uart2>;
564 pinctrl-0 = <&pinctrl_uart3>;
571 pinctrl-0 = <&pinctrl_usbh1>;