Lines Matching +full:0 +full:x00c00000
19 reg = <0x08000000 0x00800000>;
25 pinctrl-0 = <&pinctrl_i2c>;
31 pinctrl-0 = <&pinctrl_uart1>;
38 pinctrl-0 = <&pinctrl_uart2>;
45 pinctrl-0 = <&pinctrl_weim>;
48 nor: flash@0,0 {
50 reg = <0 0x00000000 0x02000000>;
52 fsl,weim-cs-timing = <0x00330e04 0x00000d01>;
59 pinctrl-0 = <&pinctrl_eth>;
61 reg = <4 0x00c00000 0x2>,
62 <4 0x00c00002 0x2>;
65 fsl,weim-cs-timing = <0x0000c700 0x19190d01>;
73 MX1_PAD_SIM_SVEN__GPIO2_14 0x0
79 MX1_PAD_I2C_SCL__I2C_SCL 0x0
80 MX1_PAD_I2C_SDA__I2C_SDA 0x0
86 MX1_PAD_UART1_TXD__UART1_TXD 0x0
87 MX1_PAD_UART1_RXD__UART1_RXD 0x0
88 MX1_PAD_UART1_CTS__UART1_CTS 0x0
89 MX1_PAD_UART1_RTS__UART1_RTS 0x0
95 MX1_PAD_UART2_TXD__UART2_TXD 0x0
96 MX1_PAD_UART2_RXD__UART2_RXD 0x0
97 MX1_PAD_UART2_CTS__UART2_CTS 0x0
98 MX1_PAD_UART2_RTS__UART2_RTS 0x0
104 MX1_PAD_A0__A0 0x0
105 MX1_PAD_A16__A16 0x0
106 MX1_PAD_A17__A17 0x0
107 MX1_PAD_A18__A18 0x0
108 MX1_PAD_A19__A19 0x0
109 MX1_PAD_A20__A20 0x0
110 MX1_PAD_A21__A21 0x0
111 MX1_PAD_A22__A22 0x0
112 MX1_PAD_A23__A23 0x0
113 MX1_PAD_A24__A24 0x0
114 MX1_PAD_BCLK__BCLK 0x0
115 MX1_PAD_CS4__CS4 0x0
116 MX1_PAD_DTACK__DTACK 0x0
117 MX1_PAD_ECB__ECB 0x0
118 MX1_PAD_LBA__LBA 0x0