dts/mediatek/mt6592.dtsi

1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 	#address-cells = <1>;
13 	#size-cells = <1>;
15 	interrupt-parent = <&sysirq>;
18 		#address-cells = <1>;
19 		#size-cells = <0>;
21 		cpu@0 {
22 			device_type = "cpu";
23 			compatible = "arm,cortex-a7";
26 		cpu@1 {
27 			device_type = "cpu";
28 			compatible = "arm,cortex-a7";
31 		cpu@2 {
32 			device_type = "cpu";
33 			compatible = "arm,cortex-a7";
36 		cpu@3 {
37 			device_type = "cpu";
38 			compatible = "arm,cortex-a7";
41 		cpu@4 {
42 			device_type = "cpu";
43 			compatible = "arm,cortex-a7";
46 		cpu@5 {
47 			device_type = "cpu";
48 			compatible = "arm,cortex-a7";
51 		cpu@6 {
52 			device_type = "cpu";
53 			compatible = "arm,cortex-a7";
56 		cpu@7 {
57 			device_type = "cpu";
58 			compatible = "arm,cortex-a7";
64 		compatible = "fixed-clock";
65 		clock-frequency = <13000000>;
66 		#clock-cells = <0>;
70 		compatible = "fixed-clock";
71 		clock-frequency = <32000>;
72 		#clock-cells = <0>;
76 		compatible = "fixed-clock";
77 		clock-frequency = <26000000>;
78 		#clock-cells = <0>;
82 		compatible = "mediatek,mt6577-timer";
86 		clock-names = "system-clk", "rtc-clk";
89 	sysirq: interrupt-controller@10200220 {
90 		compatible = "mediatek,mt6592-sysirq", "mediatek,mt6577-sysirq";
91 		interrupt-controller;
92 		#interrupt-cells = <3>;
93 		interrupt-parent = <&gic>;
97 	gic: interrupt-controller@10211000 {
98 		compatible = "arm,cortex-a7-gic";
99 		interrupt-controller;
100 		#interrupt-cells = <3>;
101 		interrupt-parent = <&gic>;
107 		compatible = "mediatek,mt6577-uart";
115 		compatible = "mediatek,mt6577-uart";
123 		compatible = "mediatek,mt6577-uart";
131 		compatible = "mediatek,mt6577-uart";