Lines Matching refs:pericfg
139 pericfg: syscon@10003000 { label
140 compatible = "mediatek,mt2701-pericfg", "syscon";
248 clocks = <&pericfg CLK_PERI_AUXADC>;
259 clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>;
269 clocks = <&pericfg CLK_PERI_UART1_SEL>, <&pericfg CLK_PERI_UART1>;
279 clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;
289 clocks = <&pericfg CLK_PERI_UART3_SEL>, <&pericfg CLK_PERI_UART3>;
301 clocks = <&pericfg CLK_PERI_I2C0>, <&pericfg CLK_PERI_AP_DMA>;
315 clocks = <&pericfg CLK_PERI_I2C1>, <&pericfg CLK_PERI_AP_DMA>;
329 clocks = <&pericfg CLK_PERI_I2C2>, <&pericfg CLK_PERI_AP_DMA>;
344 <&pericfg CLK_PERI_SPI0>;
354 clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
356 resets = <&pericfg MT2701_PERI_THERM_SW_RST>;
366 clocks = <&pericfg CLK_PERI_NFI>,
367 <&pericfg CLK_PERI_NFI_PAD>;
379 clocks = <&pericfg CLK_PERI_NFI_ECC>;
388 clocks = <&pericfg CLK_PERI_FLASH>,
404 <&pericfg CLK_PERI_SPI1>;
417 <&pericfg CLK_PERI_SPI2>;
694 clocks = <&pericfg CLK_PERI_USB0>,
695 <&pericfg CLK_PERI_USB0_MCU>,
696 <&pericfg CLK_PERI_USB_SLV>;