dts/marvell/orion5x.dtsi

1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (C) 2012 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
7 	#address-cells = <1>;
8 	#size-cells = <1>;
11 	interrupt-parent = <&intc>;
18 		#address-cells = <2>;
19 		#size-cells = <1>;
22 		devbus_bootcs: devbus-bootcs {
23 			compatible = "marvell,orion-devbus";
26 			#address-cells = <1>;
27 			#size-cells = <1>;
32 		devbus_cs0: devbus-cs0 {
33 			compatible = "marvell,orion-devbus";
36 			#address-cells = <1>;
37 			#size-cells = <1>;
42 		devbus_cs1: devbus-cs1 {
43 			compatible = "marvell,orion-devbus";
46 			#address-cells = <1>;
47 			#size-cells = <1>;
52 		devbus_cs2: devbus-cs2 {
53 			compatible = "marvell,orion-devbus";
56 			#address-cells = <1>;
57 			#size-cells = <1>;
62 		internal-regs {
63 			compatible = "simple-bus";
64 			#address-cells = <1>;
65 			#size-cells = <1>;
69 				compatible = "marvell,orion-gpio";
70 				#gpio-cells = <2>;
71 				gpio-controller;
74 				interrupt-controller;
75 				#interrupt-cells = <2>;
80 				compatible = "marvell,orion-spi";
81 				#address-cells = <1>;
82 				#size-cells = <0>;
83 				cell-index = <0>;
89 				compatible = "marvell,mv64xxx-i2c";
91 				#address-cells = <1>;
92 				#size-cells = <0>;
101 				reg-shift = <2>;
110 				reg-shift = <2>;
116 			bridge_intc: bridge-interrupt-ctrl@20110 {
117 				compatible = "marvell,orion-bridge-intc";
118 				interrupt-controller;
119 				#interrupt-cells = <1>;
125 			intc: interrupt-controller@20200 {  label
126 				compatible = "marvell,orion-intc";
127 				interrupt-controller;
128 				#interrupt-cells = <1>;
133 				compatible = "marvell,orion-timer";
135 				interrupt-parent = <&bridge_intc>;
141 				compatible = "marvell,orion-wdt";
143 				interrupt-parent = <&bridge_intc>;
150 				compatible = "marvell,orion-ehci";
156 			xor: dma-controller@60900 {
157 				compatible = "marvell,orion-xor";
175 			eth: ethernet-controller@72000 {
176 				compatible = "marvell,orion-eth";
177 				#address-cells = <1>;
178 				#size-cells = <0>;
180 				marvell,tx-checksum-limit = <1600>;
183 				ethport: ethernet-port@0 {
184 					compatible = "marvell,orion-eth-port";
188 					local-mac-address = [00 00 00 00 00 00];
189 					/* set phy-handle property in board file */
193 			mdio: mdio-bus@72004 {
194 				compatible = "marvell,orion-mdio";
195 				#address-cells = <1>;
196 				#size-cells = <0>;
205 				compatible = "marvell,orion-sata";
212 				compatible = "marvell,orion-crypto";
214 				reg-names = "regs";
216 				marvell,crypto-srams = <&crypto_sram>;
217 				marvell,crypto-sram-size = <0x800>;
222 				compatible = "marvell,orion-ehci";
229 		crypto_sram: sa-sram {
230 			compatible = "mmio-sram";
232 			#address-cells = <1>;
233 			#size-cells = <1>;