Lines Matching +full:1 +full:fc0000

24 		reg = <0x00000000 0x40000000>; /* 1GB */
50 				<&led_7seg_gpio 1 GPIO_ACTIVE_LOW>,
96 		bank-width = <1>;
114 	pinctrl-1 = <&i2c0_gpio_pins>;
119 		#address-cells = <1>;
126 			#address-cells = <1>;
131 		i2c@1 {
132 			#address-cells = <1>;
134 			reg = <1>;
148 			#address-cells = <1>;
159 			#address-cells = <1>;
182 	flash@1 {
183 		#address-cells = <1>;
184 		#size-cells = <1>;
186 		reg = <1>; /* Chip select 1 */
191 			#address-cells = <1>;
192 			#size-cells = <1>;
205 			partition@fc0000 {
228 			#address-cells = <1>;
229 			#size-cells = <1>;