dts/marvell/armada-380.dtsi

20 		#size-cells = <0>;
23 		cpu@0 {
26 			reg = <0>;
46 			bus-range = <0x00 0xff>;
49 			       <0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000
50 				0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
51 				0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000
52 				0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000
53 				0x82000000 0x1 0     MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 0 MEM */
54 				0x81000000 0x1 0     MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 0 IO  */
55 				0x82000000 0x2 0     MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 1 MEM */
56 				0x81000000 0x2 0     MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 1 IO  */
57 				0x82000000 0x3 0     MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 2 MEM */
58 				0x81000000 0x3 0     MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 2 IO  */>;
61 			pcie@1,0 {
63 				assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
64 				reg = <0x0800 0 0 0 0>;
70 				ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
71 					  0x81000000 0 0 0x81000000 0x1 0 1 0>;
72 				bus-range = <0x00 0xff>;
73 				interrupt-map-mask = <0 0 0 7>;
74 				interrupt-map = <0 0 0 1 &pcie1_intc 0>,
75 						<0 0 0 2 &pcie1_intc 1>,
76 						<0 0 0 3 &pcie1_intc 2>,
77 						<0 0 0 4 &pcie1_intc 3>;
78 				marvell,pcie-port = <0>;
79 				marvell,pcie-lane = <0>;
90 			pcie@2,0 {
92 				assigned-addresses = <0x82001000 0 0x40000 0 0x2000>;
93 				reg = <0x1000 0 0 0 0>;
99 				ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
100 					  0x81000000 0 0 0x81000000 0x2 0 1 0>;
101 				bus-range = <0x00 0xff>;
102 				interrupt-map-mask = <0 0 0 7>;
103 				interrupt-map = <0 0 0 1 &pcie2_intc 0>,
104 						<0 0 0 2 &pcie2_intc 1>,
105 						<0 0 0 3 &pcie2_intc 2>,
106 						<0 0 0 4 &pcie2_intc 3>;
108 				marvell,pcie-lane = <0>;
119 			pcie@3,0 {
121 				assigned-addresses = <0x82001800 0 0x44000 0 0x2000>;
122 				reg = <0x1800 0 0 0 0>;
128 				ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
129 					  0x81000000 0 0 0x81000000 0x3 0 1 0>;
130 				bus-range = <0x00 0xff>;
131 				interrupt-map-mask = <0 0 0 7>;
132 				interrupt-map = <0 0 0 1 &pcie3_intc 0>,
133 						<0 0 0 2 &pcie3_intc 1>,
134 						<0 0 0 3 &pcie3_intc 2>,
135 						<0 0 0 4 &pcie3_intc 3>;
137 				marvell,pcie-lane = <0>;