intel/ixp/intel-ixp43x-gateworks-gw2358.dts

1 // SPDX-License-Identifier: ISC
3  * Device Tree file for Gateworks IXP43x-based Cambria GW2358
6 /dts-v1/;
8 #include "intel-ixp43x.dtsi"
13 	#address-cells = <1>;
14 	#size-cells = <1>;
24 		stdout-path = "uart0:115200n8";
32 		compatible = "gpio-leds";
33 		led-user {
35 			gpios = <&pld1 0 GPIO_ACTIVE_LOW>;
36 			default-state = "on";
37 			linux,default-trigger = "heartbeat";
43 		compatible = "i2c-gpio";
44 		sda-gpios = <&gpio0 7 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
45 		scl-gpios = <&gpio0 6 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
46 		#address-cells = <1>;
47 		#size-cells = <0>;
62 			read-only;
65 			compatible = "gateworks,pld-gpio";
67 			gpio-controller;
68 			#gpio-cells = <2>;
72 			compatible = "gateworks,pld-gpio";
74 			gpio-controller;
75 			#gpio-cells = <2>;
82 				compatible = "intel,ixp4xx-flash", "cfi-flash";
83 				bank-width = <2>;
85 				intel,ixp4xx-eb-write-enable = <1>;
93 					compatible = "redboot-fis";
95 					fis-index-block = <0xff>;
99 				compatible = "intel,ixp4xx-compact-flash";
103 				 * depending on selected PIO mode (0-4).
105 				intel,ixp4xx-eb-t1 = <3>; // 3 cycles extra address phase
106 				intel,ixp4xx-eb-t2 = <3>; // 3 cycles extra setup phase
107 				intel,ixp4xx-eb-t3 = <15>; // 15 cycles extra strobe phase
108 				intel,ixp4xx-eb-t4 = <3>; // 3 cycles extra hold phase
109 				intel,ixp4xx-eb-t5 = <15>; // 15 cycles extra recovery phase
110 				intel,ixp4xx-eb-cycle-type = <0>; // Intel cycle type
111 				intel,ixp4xx-eb-byte-access-on-halfword = <1>;
112 				intel,ixp4xx-eb-mux-address-and-data = <0>;
113 				intel,ixp4xx-eb-ahb-split-transfers = <0>;
114 				intel,ixp4xx-eb-write-enable = <1>;
115 				intel,ixp4xx-eb-byte-access = <1>;
118 				interrupt-parent = <&gpio0>;
134 			#interrupt-cells = <1>;
135 			interrupt-map-mask = <0xf800 0 0 7>;
136 			interrupt-map =
171 			queue-rx = <&qmgr 4>;
172 			queue-txready = <&qmgr 21>;
173 			phy-mode = "rgmii";
174 			phy-handle = <&phy1>;
177 				#address-cells = <1>;
178 				#size-cells = <0>;
180 				phy1: ethernet-phy@1 {
184 				phy2: ethernet-phy@2 {
192 			queue-rx = <&qmgr 2>;
193 			queue-txready = <&qmgr 19>;
194 			phy-mode = "rgmii";
195 			phy-handle = <&phy2>;
196 			intel,npe-handle = <&npe 0>;