Lines Matching +full:mdio +full:- +full:gpio0
1 // SPDX-License-Identifier: ISC
4 * VPN and NAS. Based on know-how from Peter Denison.
10 /dts-v1/;
12 #include "intel-ixp42x.dtsi"
13 #include <dt-bindings/input/input.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
28 stdout-path = "uart1:115200n8";
38 compatible = "gpio-leds";
39 ieee1394_led: led-1394 {
41 gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
42 default-state = "off";
44 usb1_led: led-usb1 {
46 gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
47 default-state = "off";
49 usb2_led: led-usb2 {
51 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
52 default-state = "off";
54 wireless_led: led-wireless {
63 gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
64 default-state = "off";
66 pwr_led: led-pwr {
68 gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
69 default-state = "on";
70 linux,default-trigger = "heartbeat";
75 compatible = "gpio-keys";
77 button-reset {
78 wakeup-source;
81 gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
88 compatible = "intel,ixp4xx-flash", "cfi-flash";
89 bank-width = <2>;
91 intel,ixp4xx-eb-write-enable = <1>;
96 compatible = "redboot-fis";
98 fis-index-block = <0x7f>;
102 /* EPSON RTC7301 DG DIL-capsule */
109 intel,ixp4xx-eb-t1 = <0>; // no cycles extra address phase
110 intel,ixp4xx-eb-t2 = <0>; // no cycles extra setup phase
111 intel,ixp4xx-eb-t3 = <15>; // 15 cycles extra strobe phase
112 intel,ixp4xx-eb-t4 = <3>; // 3 cycles extra hold phase
113 intel,ixp4xx-eb-t5 = <15>; // 15 cycles extra recovery phase
114 intel,ixp4xx-eb-cycle-type = <0>; // Intel cycle
115 intel,ixp4xx-eb-byte-access-on-halfword = <0>;
116 intel,ixp4xx-eb-mux-address-and-data = <0>;
117 intel,ixp4xx-eb-ahb-split-transfers = <0>;
118 intel,ixp4xx-eb-write-enable = <1>;
119 intel,ixp4xx-eb-byte-access = <1>;
122 reg-io-width = <1>;
123 native-endian;
138 #interrupt-cells = <1>;
139 interrupt-map-mask = <0xf800 0 0 7>;
140 interrupt-map =
142 <0x7000 0 0 1 &gpio0 7 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 14 is irq 7 */
144 <0x7800 0 0 1 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 15 is irq 8 */
146 <0x8000 0 0 1 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 16 is irq 11 */
147 <0x8000 0 0 2 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 16 is irq 10 */
148 <0x8000 0 0 3 &gpio0 9 IRQ_TYPE_LEVEL_LOW>; /* INT C on slot 16 is irq 9 */
153 intel,ixp4xx-gpio15-clkout;
159 queue-rx = <&qmgr 3>;
160 queue-txready = <&qmgr 20>;
161 phy-mode = "rgmii";
162 phy-handle = <&phy9>;
164 mdio {
165 #address-cells = <1>;
166 #size-cells = <0>;
172 phy0: ethernet-phy@0 {
175 phy1: ethernet-phy@1 {
178 phy2: ethernet-phy@2 {
181 phy3: ethernet-phy@3 {
186 phy9: ethernet-phy@9 {
190 /* The switch uses MDIO addresses 16 thru 31 */
196 #address-cells = <1>;
197 #size-cells = <0>;
202 phy-handle = <&phy0>;
208 phy-handle = <&phy1>;
214 phy-handle = <&phy2>;
220 phy-handle = <&phy3>;
226 phy-mode = "rgmii-id";
229 fixed-link {
231 full-duplex;
242 queue-rx = <&qmgr 4>;
243 queue-txready = <&qmgr 21>;
244 phy-mode = "rgmii";
245 fixed-link {
247 full-duplex;