Lines Matching +full:0 +full:xfff5d000
14 cpu_suspend = <0x84000002>;
15 cpu_off = <0x84000004>;
16 cpu_on = <0x84000006>;
27 reg = <0xffe08000 0x10000>;
28 interrupts = <0 83 4>;
30 calxeda,port-phys = < &combophy5 0>, <&combophy0 0>,
35 calxeda,led-order = <4 0 1 2 3>;
40 reg = <0xffe0e000 0x1000>;
41 interrupts = <0 90 4>;
48 reg = <0xfff20000 0x1000>;
49 interrupts = <0 7 4>;
58 reg = <0xfff30000 0x1000>;
59 interrupts = <0 14 4>;
69 reg = <0xfff31000 0x1000>;
70 interrupts = <0 15 4>;
80 reg = <0xfff32000 0x1000>;
81 interrupts = <0 16 4>;
91 reg = <0xfff33000 0x1000>;
92 interrupts = <0 17 4>;
100 reg = <0xfff34000 0x1000>;
101 interrupts = <0 18 4>;
108 reg = <0xfff35000 0x1000>;
109 interrupts = <0 19 4>;
116 reg = <0xfff36000 0x1000>;
117 interrupts = <0 20 4>;
125 reg = <0xfff3a000 0x1000>;
126 interrupts = <0 24 4>;
133 reg = <0xfff3c000 0x1000>;
137 #size-cells = <0>;
140 #clock-cells = <0>;
146 #clock-cells = <0>;
149 reg = <0x108>;
153 #clock-cells = <0>;
156 reg = <0x100>;
160 #clock-cells = <0>;
163 reg = <0x104>;
167 #clock-cells = <0>;
170 reg = <0x104>;
174 #clock-cells = <0>;
177 reg = <0x10C>;
181 #clock-cells = <0>;
184 reg = <0x114>;
188 #clock-cells = <0>;
197 reg = <0xfff3d000 0x1000>;
198 interrupts = <0 92 4>;
205 reg = <0xfff50000 0x1000>;
206 interrupts = <0 77 4>, <0 78 4>, <0 79 4>;
212 reg = <0xfff51000 0x1000>;
213 interrupts = <0 80 4>, <0 81 4>, <0 82 4>;
220 reg = <0xfff58000 0x1000>;
227 reg = <0xfff5d000 0x1000>;