Lines Matching +full:0 +full:x2400

8 	#size-cells = <0>;
10 cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>;
12 cfam@0,0 {
13 reg = <0 0>;
16 chip-id = <0>;
20 reg = <0x1000 0x400>;
25 reg = <0x1800 0x400>;
27 #size-cells = <0>;
29 cfam0_i2c0: i2c-bus@0 {
31 #size-cells = <0>;
32 reg = <0>; /* OMI01 */
37 #size-cells = <0>;
43 #size-cells = <0>;
49 #size-cells = <0>;
55 #size-cells = <0>;
61 #size-cells = <0>;
67 #size-cells = <0>;
73 #size-cells = <0>;
80 reg = <0x1c00 0x400>;
82 #size-cells = <0>;
84 cfam0_spi0: spi@0 {
85 reg = <0x0>;
87 #size-cells = <0>;
89 eeprom@0 {
90 at25,byte-len = <0x80000>;
95 reg = <0>;
101 reg = <0x20>;
103 #size-cells = <0>;
105 eeprom@0 {
106 at25,byte-len = <0x80000>;
111 reg = <0>;
117 reg = <0x40>;
120 #size-cells = <0>;
122 eeprom@0 {
123 at25,byte-len = <0x80000>;
128 reg = <0>;
134 reg = <0x60>;
137 #size-cells = <0>;
139 eeprom@0 {
140 at25,byte-len = <0x80000>;
145 reg = <0>;
153 reg = <0x2400 0x400>;
155 #size-cells = <0>;
170 reg = <0x3400 0x400>;
172 #size-cells = <0>;
179 cfam@1,0 {
180 reg = <1 0>;
187 reg = <0x1000 0x400>;
192 reg = <0x1800 0x400>;
194 #size-cells = <0>;
198 #size-cells = <0>;
204 #size-cells = <0>;
210 #size-cells = <0>;
216 #size-cells = <0>;
222 #size-cells = <0>;
228 #size-cells = <0>;
234 #size-cells = <0>;
240 #size-cells = <0>;
247 reg = <0x1c00 0x400>;
249 #size-cells = <0>;
251 cfam1_spi0: spi@0 {
252 reg = <0x0>;
254 #size-cells = <0>;
256 eeprom@0 {
257 at25,byte-len = <0x80000>;
262 reg = <0>;
268 reg = <0x20>;
270 #size-cells = <0>;
272 eeprom@0 {
273 at25,byte-len = <0x80000>;
278 reg = <0>;
284 reg = <0x40>;
287 #size-cells = <0>;
289 eeprom@0 {
290 at25,byte-len = <0x80000>;
295 reg = <0>;
301 reg = <0x60>;
304 #size-cells = <0>;
306 eeprom@0 {
307 at25,byte-len = <0x80000>;
312 reg = <0>;
320 reg = <0x2400 0x400>;
322 #size-cells = <0>;
336 reg = <0x3400 0x400>;
338 #size-cells = <0>;