Lines Matching +full:i2c +full:- +full:compatible

1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
3 #include "aspeed-g4.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
8 compatible = "quanta,q71l-bmc", "aspeed,ast2400";
30 stdout-path = &uart5;
38 reserved-memory {
39 #address-cells = <1>;
40 #size-cells = <1>;
44 no-map;
50 compatible = "gpio-leds";
65 iio-hwmon {
66 compatible = "iio-hwmon";
67 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
72 iio-hwmon-battery {
73 compatible = "iio-hwmon";
74 io-channels = <&adc 11>;
78 compatible = "i2c-mux-gpio";
79 #address-cells = <1>;
80 #size-cells = <0>;
82 /* mux-gpios = <&sgpio 10 GPIO_ACTIVE_HIGH> */
83 i2c-parent = <&i2c1>;
92 m25p,fast-read;
93 #include "openbmc-flash-layout.dtsi"
99 pinctrl-names = "default";
100 pinctrl-0 = <&pinctrl_spi1_default>;
104 m25p,fast-read;
110 pinctrl-names = "default";
111 pinctrl-0 = <&pinctrl_vgahs_default &pinctrl_vgavs_default
117 memory-region = <&vga_memory>;
130 snoop-ports = <0x80>;
135 pinctrl-names = "default";
136 pinctrl-0 = <&pinctrl_rmii1_default>;
137 use-ncsi;
142 pinctrl-names = "default";
143 pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
163 compatible = "ti,tmp75";
169 compatible = "ti,tmp75";
175 compatible = "ti,tmp75";
181 compatible = "atmel,24c64";
187 compatible = "atmel,24c64";
200 i2c-mux@74 {
201 compatible = "nxp,pca9546";
203 #address-cells = <1>;
204 #size-cells = <0>;
205 i2c-mux-idle-disconnect; /* may use mux@77 next. */
207 i2c_pcie2: i2c@0 {
208 #address-cells = <1>;
209 #size-cells = <0>;
213 i2c_pcie3: i2c@1 {
214 #address-cells = <1>;
215 #size-cells = <0>;
219 i2c_pcie6: i2c@2 {
220 #address-cells = <1>;
221 #size-cells = <0>;
225 i2c_pcie7: i2c@3 {
226 #address-cells = <1>;
227 #size-cells = <0>;
241 i2c-mux@77 {
242 compatible = "nxp,pca9548";
243 #address-cells = <1>;
244 #size-cells = <0>;
246 i2c-mux-idle-disconnect; /* may use mux@74 next. */
248 i2c_pcie1: i2c@0 {
249 #address-cells = <1>;
250 #size-cells = <0>;
254 i2c_pcie4: i2c@1 {
255 #address-cells = <1>;
256 #size-cells = <0>;
260 i2c_pcie5: i2c@2 {
261 #address-cells = <1>;
262 #size-cells = <0>;
266 i2c_pcie8: i2c@3 {
267 #address-cells = <1>;
268 #size-cells = <0>;
272 i2c_pcie9: i2c@4 {
273 #address-cells = <1>;
274 #size-cells = <0>;
278 i2c_pcie10: i2c@5 {
279 #address-cells = <1>;
280 #size-cells = <0>;
284 i2c_ssd1: i2c@6 {
285 #address-cells = <1>;
286 #size-cells = <0>;
290 i2c_ssd2: i2c@7 {
291 #address-cells = <1>;
292 #size-cells = <0>;
303 compatible = "atmel,24c64";
328 i2c-mux@70 {
329 compatible = "nxp,pca9546";
331 #address-cells = <1>;
332 #size-cells = <0>;
334 i2c_psu4: i2c@0 {
335 #address-cells = <1>;
336 #size-cells = <0>;
340 compatible = "pmbus";
345 i2c_psu1: i2c@1 {
346 #address-cells = <1>;
347 #size-cells = <0>;
351 compatible = "pmbus";
356 i2c_psu3: i2c@2 {
357 #address-cells = <1>;
358 #size-cells = <0>;
362 compatible = "pmbus";
367 i2c_psu2: i2c@3 {
368 #address-cells = <1>;
369 #size-cells = <0>;
373 compatible = "pmbus";
381 compatible = "atmel,24c64";
391 compatible = "atmel,24c64";
411 pinctrl-names = "default";
412 pinctrl-0 = <&pinctrl_pwm0_default
419 aspeed,fan-tach-ch = /bits/ 8 <0x00>;
424 aspeed,fan-tach-ch = /bits/ 8 <0x01>;
429 aspeed,fan-tach-ch = /bits/ 8 <0x02>;
434 aspeed,fan-tach-ch = /bits/ 8 <0x03>;
439 aspeed,fan-tach-ch = /bits/ 8 <0x04>;
444 aspeed,fan-tach-ch = /bits/ 8 <0x05>;
449 aspeed,fan-tach-ch = /bits/ 8 <0x06>;
454 aspeed,fan-tach-ch = /bits/ 8 <0x07>;
459 i2c@0 {
461 #address-cells = <1>;
462 #size-cells = <0>;
466 compatible = "atmel,24c02";
472 compatible = "atmel,24c02";
478 compatible = "atmel,24c02";
484 compatible = "atmel,24c02";
489 i2c@1 {
491 #address-cells = <1>;
492 #size-cells = <0>;
496 compatible = "atmel,24c02";
502 compatible = "atmel,24c02";
508 compatible = "atmel,24c02";
514 compatible = "atmel,24c02";