Lines Matching +full:0 +full:x60000
18 reg = <0x80000000 0x20000000>;
28 reg = <0x98000000 0x04000000>; /* 64M */
32 size = <0x01000000>;
33 alignment = <0x01000000>;
39 size = <0x02000000>;
40 alignment = <0x01000000>;
69 gpios = <&gpio ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>;
70 linux,code = <ASPEED_GPIO(Z, 0)>;
121 gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_LOW>;
139 gpios = <&pca9552 0 GPIO_ACTIVE_LOW>;
170 #size-cells = <0>;
176 enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
182 io-channels = <&adc 0>;
234 pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
238 fan@0 {
239 reg = <0x00>;
240 aspeed,fan-tach-ch = /bits/ 8 <0x00>;
244 reg = <0x01>;
245 aspeed,fan-tach-ch = /bits/ 8 <0x01>;
249 reg = <0x02>;
250 aspeed,fan-tach-ch = /bits/ 8 <0x02>;
254 reg = <0x03>;
255 aspeed,fan-tach-ch = /bits/ 8 <0x03>;
259 reg = <0x04>;
260 aspeed,fan-tach-ch = /bits/ 8 <0x04>;
264 reg = <0x00>;
265 aspeed,fan-tach-ch = /bits/ 8 <0x05>;
269 reg = <0x01>;
270 aspeed,fan-tach-ch = /bits/ 8 <0x06>;
274 reg = <0x02>;
275 aspeed,fan-tach-ch = /bits/ 8 <0x07>;
279 reg = <0x03>;
280 aspeed,fan-tach-ch = /bits/ 8 <0x08>;
284 reg = <0x04>;
285 aspeed,fan-tach-ch = /bits/ 8 <0x09>;
291 flash@0 {
300 u-boot@0 {
301 reg = < 0 0x60000 >;
305 reg = < 0x60000 0x20000 >;
309 reg = < 0x80000 0x1F80000 >;
323 u-boot@0 {
324 reg = < 0 0x60000 >;
328 reg = < 0x60000 0x20000 >;
332 reg = < 0x80000 0x1F80000 >;
342 pinctrl-0 = <&pinctrl_spi1_default>;
344 flash@0 {
363 pinctrl-0 = <&pinctrl_txd1_default
378 pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
389 pinctrl-0 = <&pinctrl_rmii1_default>;
400 pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
408 reg = <0x48>;
431 * Power Supply 0
438 reg = <0x60>;
440 #size-cells = <0>;
444 gpio@0 {
445 reg = <0>;
512 reg = <0x68>;
517 reg = <0x69>;
530 reg = <0x28>;
535 reg = <0x29>;
540 reg = <0x2d>;
562 reg = <0x50>;
587 reg = <0x32>;
592 reg = <0x48>;
597 reg = <0x49>;
622 pinctrl-0 = <&pinctrl_adc0_default
647 pinctrl-0 = <&pinctrl_wdtrst1_default>;