dts/aspeed/aspeed-bmc-facebook-wedge400.dts

1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include "ast2500-facebook-netbmc-common.dtsi"
10 	compatible = "facebook,wedge400-bmc", "aspeed,ast2500";
14 		 * PCA9548 (2-0070) provides 8 channels connecting to
27 		 * PCA9548 (8-0070) provides 8 channels connecting to
40 		 * PCA9548 (11-0076) provides 8 channels connecting to
56 		stdout-path = &uart1;
60 	ast-adc-hwmon {
61 		compatible = "iio-hwmon";
62 		io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>,
67 	 * GPIO-based SPI Master is required to access SPI TPM, because
68 	 * full-duplex SPI transactions are not supported by ASPEED SPI
73 		compatible = "spi-gpio";
74 		#address-cells = <1>;
75 		#size-cells = <0>;
77 		cs-gpios = <&gpio ASPEED_GPIO(R, 2) GPIO_ACTIVE_LOW>;
78 		gpio-sck = <&gpio ASPEED_GPIO(R, 3) GPIO_ACTIVE_HIGH>;
79 		gpio-mosi = <&gpio ASPEED_GPIO(R, 4) GPIO_ACTIVE_HIGH>;
80 		gpio-miso = <&gpio ASPEED_GPIO(R, 5) GPIO_ACTIVE_HIGH>;
81 		num-chipselects = <1>;
84 			compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
85 			spi-max-frequency = <33000000>;
95 #include "facebook-bmc-flash-layout-128.dtsi"
100 		compatible = "fixed-partitions";
101 		#address-cells = <1>;
102 		#size-cells = <1>;
113 	pinctrl-names = "default";
114 	pinctrl-0 = <&pinctrl_txd2_default
120 	pinctrl-names = "default";
121 	pinctrl-0 = <&pinctrl_txd4_default
126  * I2C bus #0 is multi-master environment dedicated for BMC and Bridge IC
131 	multi-master;
132 	bus-frequency = <1000000>;
142 	i2c-mux@70 {
144 		#address-cells = <1>;
145 		#size-cells = <0>;
147 		i2c-mux-idle-disconnect;
149 		imux16: i2c@0 {
150 			#address-cells = <1>;
151 			#size-cells = <0>;
155 		imux17: i2c@1 {
156 			#address-cells = <1>;
157 			#size-cells = <0>;
161 		imux18: i2c@2 {
162 			#address-cells = <1>;
163 			#size-cells = <0>;
167 		imux19: i2c@3 {
168 			#address-cells = <1>;
169 			#size-cells = <0>;
173 		imux20: i2c@4 {
174 			#address-cells = <1>;
175 			#size-cells = <0>;
179 		imux21: i2c@5 {
180 			#address-cells = <1>;
181 			#size-cells = <0>;
185 		imux22: i2c@6 {
186 			#address-cells = <1>;
187 			#size-cells = <0>;
191 		imux23: i2c@7 {
192 			#address-cells = <1>;
193 			#size-cells = <0>;
222 	i2c-mux@70 {
224 		#address-cells = <1>;
225 		#size-cells = <0>;
227 		i2c-mux-idle-disconnect;
229 		imux24: i2c@0 {
230 			#address-cells = <1>;
231 			#size-cells = <0>;
235 		imux25: i2c@1 {
236 			#address-cells = <1>;
237 			#size-cells = <0>;
241 		imux26: i2c@2 {
242 			#address-cells = <1>;
243 			#size-cells = <0>;
247 		imux27: i2c@3 {
248 			#address-cells = <1>;
249 			#size-cells = <0>;
253 		imux28: i2c@4 {
254 			#address-cells = <1>;
255 			#size-cells = <0>;
259 		imux29: i2c@5 {
260 			#address-cells = <1>;
261 			#size-cells = <0>;
265 		imux30: i2c@6 {
266 			#address-cells = <1>;
267 			#size-cells = <0>;
271 		imux31: i2c@7 {
272 			#address-cells = <1>;
273 			#size-cells = <0>;
291 	i2c-mux@76 {
293 		#address-cells = <1>;
294 		#size-cells = <0>;
296 		i2c-mux-idle-disconnect;
298 		imux32: i2c@0 {
299 			#address-cells = <1>;
300 			#size-cells = <0>;
304 		imux33: i2c@1 {
305 			#address-cells = <1>;
306 			#size-cells = <0>;
310 		imux34: i2c@2 {
311 			#address-cells = <1>;
312 			#size-cells = <0>;
316 		imux35: i2c@3 {
317 			#address-cells = <1>;
318 			#size-cells = <0>;
322 		imux36: i2c@4 {
323 			#address-cells = <1>;
324 			#size-cells = <0>;
328 		imux37: i2c@5 {
329 			#address-cells = <1>;
330 			#size-cells = <0>;
334 		imux38: i2c@6 {
335 			#address-cells = <1>;
336 			#size-cells = <0>;
340 		imux39: i2c@7 {
341 			#address-cells = <1>;
342 			#size-cells = <0>;
370 	max-frequency = <25000000>;
373 	 * Controller in AST2500 SoC.
375 	sdhci-caps-mask = <0x0 0x580000>;