Lines Matching +full:0 +full:x2c006000
16 arm,hbi = <0x237>;
17 arm,vexpress,site = <0xf>;
36 #size-cells = <0>;
38 cpu@0 {
41 reg = <0>;
53 reg = <0 0x80000000 0 0x40000000>;
61 /* Chipselect 2 is physically at 0x18000000 */
65 reg = <0 0x18000000 0 0x00800000>;
72 reg = <0 0x2b000000 0 0x1000>;
73 interrupts = <0 85 4>;
80 reg = <0 0x2b0a0000 0 0x1000>;
88 reg = <0 0x2b060000 0 0x1000>;
89 interrupts = <0 98 4>;
97 #address-cells = <0>;
99 reg = <0 0x2c001000 0 0x1000>,
100 <0 0x2c002000 0 0x2000>,
101 <0 0x2c004000 0 0x2000>,
102 <0 0x2c006000 0 0x2000>;
103 interrupts = <1 9 0xf04>;
108 reg = <0 0x7ffd0000 0 0x1000>;
109 interrupts = <0 86 4>,
110 <0 87 4>;
117 reg = <0 0x7ffb0000 0 0x1000>;
118 interrupts = <0 92 4>,
119 <0 88 4>,
120 <0 89 4>,
121 <0 90 4>,
122 <0 91 4>;
129 interrupts = <1 13 0xf08>,
130 <1 14 0xf08>,
131 <1 11 0xf08>,
132 <1 10 0xf08>;
137 interrupts = <0 68 4>,
138 <0 69 4>;
145 clock-controller-0 {
148 arm,vexpress-sysreg,func = <1 0>;
150 #clock-cells = <0>;
159 #clock-cells = <0>;
168 #clock-cells = <0>;
177 #clock-cells = <0>;
186 #clock-cells = <0>;
195 #clock-cells = <0>;
202 arm,vexpress-sysreg,func = <2 0>;
213 arm,vexpress-sysreg,func = <3 0>;
220 arm,vexpress-sysreg,func = <4 0>;
227 arm,vexpress-sysreg,func = <12 0>;
234 arm,vexpress-sysreg,func = <13 0>;
240 ranges = <0x8000000 0 0x8000000 0x18000000>;
247 ranges = <0 0 0x40000000 0x3fef0000>;
249 interrupt-map-mask = <0 3>;
250 interrupt-map = <0 0 &gic 0 36 4>,
251 <0 1 &gic 0 37 4>,
252 <0 2 &gic 0 38 4>,
253 <0 3 &gic 0 39 4>;