Lines Matching +full:0 +full:x10010000
43 /* 128 MiB memory @ 0x0 */
44 reg = <0x00000000 0x08000000>;
57 #clock-cells = <0>;
63 #clock-cells = <0>;
72 #clock-cells = <0>;
74 clock-frequency = <0>;
80 reg = <0x40000000 0x04000000>;
90 reg = <0x44000000 0x04000000>;
100 reg = <0x4e000000 0x10000>;
110 reg = <0x4f000000 0x20000>;
117 #size-cells = <0>;
121 #size-cells = <0>;
123 port@0 {
124 reg = <0>;
160 reg = <0x10000000 0x1000>;
161 ranges = <0x0 0x10000000 0x1000>;
165 led@8,0 {
167 reg = <0x08 0x04>;
168 offset = <0x08>;
169 mask = <0x01>;
170 label = "versatile:0";
176 reg = <0x08 0x04>;
177 offset = <0x08>;
178 mask = <0x02>;
185 reg = <0x08 0x04>;
186 offset = <0x08>;
187 mask = <0x04>;
194 reg = <0x08 0x04>;
195 offset = <0x08>;
196 mask = <0x08>;
202 reg = <0x08 0x04>;
203 offset = <0x08>;
204 mask = <0x10>;
210 reg = <0x08 0x04>;
211 offset = <0x08>;
212 mask = <0x20>;
218 reg = <0x08 0x04>;
219 offset = <0x08>;
220 mask = <0x40>;
226 reg = <0x08 0x04>;
227 offset = <0x08>;
228 mask = <0x80>;
234 reg = <0x0c 0x04>;
235 #clock-cells = <0>;
236 lock-offset = <0x20>;
237 vco-offset = <0x0C>;
242 reg = <0x10 0x04>;
243 #clock-cells = <0>;
244 lock-offset = <0x20>;
245 vco-offset = <0x10>;
250 reg = <0x14 0x04>;
251 #clock-cells = <0>;
252 lock-offset = <0x20>;
253 vco-offset = <0x14>;
258 reg = <0x18 0x04>;
259 #clock-cells = <0>;
260 lock-offset = <0x20>;
261 vco-offset = <0x18>;
266 reg = <0x1c 0x04>;
267 #clock-cells = <0>;
268 lock-offset = <0x20>;
269 vco-offset = <0x1c>;
276 #size-cells = <0>;
278 reg = <0x10002000 0x1000>;
282 reg = <0x68>;
288 reg = <0x10004000 0x1000>;
295 reg = <0x10005000 0x1000>;
305 cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
311 reg = <0x10006000 0x1000>;
318 reg = <0x10007000 0x1000>;
325 reg = <0x10008000 0x1000>;
332 reg = <0x10009000 0x1000>;
339 reg = <0x1000a000 0x1000>;
346 reg = <0x1000b000 0x1000>;
353 reg = <0x1000c000 0x1000>;
360 reg = <0x1000d000 0x1000>;
367 reg = <0x10010000 0x1000>;
375 reg = <0x10011000 0x1000>;
382 reg = <0x10012000 0x1000>;
389 reg = <0x10013000 0x1000>;
400 reg = <0x10014000 0x1000>;
411 reg = <0x10015000 0x1000>;
422 reg = <0x10017000 0x1000>;
429 reg = <0x10020000 0x1000>;
439 arm,pl11x,tft-r0g0b0-pads = <0 8 16>;