Lines Matching full:de_clocks
581 de_clocks: clock@3000000 { label
599 clocks = <&de_clocks CLK_BUS_FE0>, <&de_clocks CLK_FE0>,
600 <&de_clocks CLK_DRAM_FE0>;
603 resets = <&de_clocks RST_FE0>;
623 clocks = <&de_clocks CLK_BUS_FE1>, <&de_clocks CLK_FE1>,
624 <&de_clocks CLK_DRAM_FE1>;
627 resets = <&de_clocks RST_FE0>;
647 clocks = <&de_clocks CLK_BUS_BE0>, <&de_clocks CLK_BE0>,
648 <&de_clocks CLK_DRAM_BE0>;
651 resets = <&de_clocks RST_BE0>;
687 clocks = <&de_clocks CLK_BUS_BE1>, <&de_clocks CLK_BE1>,
688 <&de_clocks CLK_DRAM_BE1>;
691 resets = <&de_clocks RST_BE1>;
727 clocks = <&de_clocks CLK_BUS_DEU0>,
728 <&de_clocks CLK_IEP_DEU0>,
729 <&de_clocks CLK_DRAM_DEU0>;
733 resets = <&de_clocks RST_DEU0>;
769 clocks = <&de_clocks CLK_BUS_DEU1>,
770 <&de_clocks CLK_IEP_DEU1>,
771 <&de_clocks CLK_DRAM_DEU1>;
775 resets = <&de_clocks RST_DEU1>;
811 clocks = <&de_clocks CLK_BUS_DRC0>,
812 <&de_clocks CLK_IEP_DRC0>,
813 <&de_clocks CLK_DRAM_DRC0>;
817 resets = <&de_clocks RST_DRC0>;
845 clocks = <&de_clocks CLK_BUS_DRC1>,
846 <&de_clocks CLK_IEP_DRC1>,
847 <&de_clocks CLK_DRAM_DRC1>;
851 resets = <&de_clocks RST_DRC1>;