Lines Matching full:ccu

46 #include <dt-bindings/clock/sun8i-v3s-ccu.h>
47 #include <dt-bindings/reset/sun8i-v3s-ccu.h>
65 				 <&ccu CLK_TCON0>;
78 			clocks = <&ccu CLK_CPU>;
127 			clocks = <&ccu CLK_BUS_DE>,
128 				 <&ccu CLK_DE>;
131 			resets = <&ccu RST_BUS_DE>;
181 			clocks = <&ccu CLK_BUS_DMA>;
182 			resets = <&ccu RST_BUS_DMA>;
190 			clocks = <&ccu CLK_BUS_TCON0>,
191 				 <&ccu CLK_TCON0>;
196 			resets = <&ccu RST_BUS_TCON0>;
224 			clocks = <&ccu CLK_BUS_MMC0>,
225 				 <&ccu CLK_MMC0>,
226 				 <&ccu CLK_MMC0_OUTPUT>,
227 				 <&ccu CLK_MMC0_SAMPLE>;
232 			resets = <&ccu RST_BUS_MMC0>;
245 			clocks = <&ccu CLK_BUS_MMC1>,
246 				 <&ccu CLK_MMC1>,
247 				 <&ccu CLK_MMC1_OUTPUT>,
248 				 <&ccu CLK_MMC1_SAMPLE>;
253 			resets = <&ccu RST_BUS_MMC1>;
266 			clocks = <&ccu CLK_BUS_MMC2>,
267 				 <&ccu CLK_MMC2>,
268 				 <&ccu CLK_MMC2_OUTPUT>,
269 				 <&ccu CLK_MMC2_SAMPLE>;
274 			resets = <&ccu RST_BUS_MMC2>;
287 			clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
291 			resets = <&ccu RST_BUS_CE>;
298 			clocks = <&ccu CLK_BUS_OTG>;
299 			resets = <&ccu RST_BUS_OTG>;
314 			clocks = <&ccu CLK_USB_PHY0>;
316 			resets = <&ccu RST_USB_PHY0>;
326 			clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>;
327 			resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>;
337 			clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>,
338 				 <&ccu CLK_USB_OHCI0>;
339 			resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>;
345 		ccu: clock@1c20000 {  label
346 			compatible = "allwinner,sun8i-v3s-ccu";
369 			clocks = <&ccu CLK_BUS_PIO>, <&osc24M>,
495 			clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
497 			resets = <&ccu RST_BUS_CODEC>;
515 			clocks = <&ccu CLK_BUS_UART0>;
518 			resets = <&ccu RST_BUS_UART0>;
528 			clocks = <&ccu CLK_BUS_UART1>;
531 			resets = <&ccu RST_BUS_UART1>;
541 			clocks = <&ccu CLK_BUS_UART2>;
544 			resets = <&ccu RST_BUS_UART2>;
554 			clocks = <&ccu CLK_BUS_I2C0>;
555 			resets = <&ccu RST_BUS_I2C0>;
567 			clocks = <&ccu CLK_BUS_I2C1>;
568 			resets = <&ccu RST_BUS_I2C1>;
580 			resets = <&ccu RST_BUS_EMAC>;
582 			clocks = <&ccu CLK_BUS_EMAC>;
610 						clocks = <&ccu CLK_BUS_EPHY>;
611 						resets = <&ccu RST_BUS_EPHY>;
621 			clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
627 			resets = <&ccu RST_BUS_SPI0>;
648 			clocks = <&ccu CLK_BUS_CSI>,
649 				 <&ccu CLK_CSI1_SCLK>,
650 				 <&ccu CLK_DRAM_CSI>;
652 			resets = <&ccu RST_BUS_CSI>;