Lines Matching full:ccu
47 #include <dt-bindings/clock/sun8i-r40-ccu.h>
49 #include <dt-bindings/reset/sun8i-r40-ccu.h>
88 clocks = <&ccu CLK_CPU>;
97 clocks = <&ccu CLK_CPU>;
106 clocks = <&ccu CLK_CPU>;
115 clocks = <&ccu CLK_CPU>;
177 clocks = <&ccu CLK_BUS_DE>,
178 <&ccu CLK_DE>;
181 resets = <&ccu RST_BUS_DE>;
234 clocks = <&ccu CLK_BUS_DEINTERLACE>,
235 <&ccu CLK_DEINTERLACE>,
241 <&ccu CLK_DRAM_CSI1>;
243 resets = <&ccu RST_BUS_DEINTERLACE>;
285 clocks = <&ccu CLK_BUS_DMA>;
288 resets = <&ccu RST_BUS_DMA>;
297 clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
299 resets = <&ccu RST_BUS_SPI0>;
310 clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
312 resets = <&ccu RST_BUS_SPI1>;
323 clocks = <&ccu CLK_BUS_CSI0>, <&ccu CLK_CSI_SCLK>,
324 <&ccu CLK_DRAM_CSI0>;
326 resets = <&ccu RST_BUS_CSI0>;
335 clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
336 <&ccu CLK_DRAM_VE>;
338 resets = <&ccu RST_BUS_VE>;
349 clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
351 resets = <&ccu RST_BUS_MMC0>;
365 clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
367 resets = <&ccu RST_BUS_MMC1>;
379 clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
381 resets = <&ccu RST_BUS_MMC2>;
395 clocks = <&ccu CLK_BUS_MMC3>, <&ccu CLK_MMC3>;
397 resets = <&ccu RST_BUS_MMC3>;
417 clocks = <&ccu CLK_USB_PHY0>,
418 <&ccu CLK_USB_PHY1>,
419 <&ccu CLK_USB_PHY2>;
423 resets = <&ccu RST_USB_PHY0>,
424 <&ccu RST_USB_PHY1>,
425 <&ccu RST_USB_PHY2>;
437 clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
439 resets = <&ccu RST_BUS_CE>;
447 clocks = <&ccu CLK_BUS_SPI2>, <&ccu CLK_SPI2>;
449 resets = <&ccu RST_BUS_SPI2>;
459 clocks = <&ccu CLK_BUS_SATA>, <&ccu CLK_SATA>;
460 resets = <&ccu RST_BUS_SATA>;
469 clocks = <&ccu CLK_BUS_EHCI1>;
470 resets = <&ccu RST_BUS_EHCI1>;
480 clocks = <&ccu CLK_BUS_OHCI1>,
481 <&ccu CLK_USB_OHCI1>;
482 resets = <&ccu RST_BUS_OHCI1>;
492 clocks = <&ccu CLK_BUS_EHCI2>;
493 resets = <&ccu RST_BUS_EHCI2>;
503 clocks = <&ccu CLK_BUS_OHCI2>,
504 <&ccu CLK_USB_OHCI2>;
505 resets = <&ccu RST_BUS_OHCI2>;
516 clocks = <&ccu CLK_BUS_SPI3>, <&ccu CLK_SPI3>;
518 resets = <&ccu RST_BUS_SPI3>;
524 ccu: clock@1c20000 { label
525 compatible = "allwinner,sun8i-r40-ccu";
546 clocks = <&ccu CLK_BUS_PIO>, <&osc24M>,
769 clocks = <&ccu CLK_BUS_IR0>, <&ccu CLK_IR0>;
772 resets = <&ccu RST_BUS_IR0>;
782 clocks = <&ccu CLK_BUS_IR1>, <&ccu CLK_IR1>;
785 resets = <&ccu RST_BUS_IR1>;
795 clocks = <&ccu CLK_BUS_I2S0>, <&ccu CLK_I2S0>;
797 resets = <&ccu RST_BUS_I2S0>;
808 clocks = <&ccu CLK_BUS_I2S1>, <&ccu CLK_I2S1>;
810 resets = <&ccu RST_BUS_I2S1>;
821 clocks = <&ccu CLK_BUS_I2S2>, <&ccu CLK_I2S2>;
823 resets = <&ccu RST_BUS_I2S2>;
831 clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
834 resets = <&ccu RST_BUS_THS>;
845 clocks = <&ccu CLK_BUS_UART0>;
846 resets = <&ccu RST_BUS_UART0>;
856 clocks = <&ccu CLK_BUS_UART1>;
857 resets = <&ccu RST_BUS_UART1>;
867 clocks = <&ccu CLK_BUS_UART2>;
868 resets = <&ccu RST_BUS_UART2>;
878 clocks = <&ccu CLK_BUS_UART3>;
879 resets = <&ccu RST_BUS_UART3>;
889 clocks = <&ccu CLK_BUS_UART4>;
890 resets = <&ccu RST_BUS_UART4>;
900 clocks = <&ccu CLK_BUS_UART5>;
901 resets = <&ccu RST_BUS_UART5>;
911 clocks = <&ccu CLK_BUS_UART6>;
912 resets = <&ccu RST_BUS_UART6>;
922 clocks = <&ccu CLK_BUS_UART7>;
923 resets = <&ccu RST_BUS_UART7>;
931 clocks = <&ccu CLK_BUS_I2C0>;
932 resets = <&ccu RST_BUS_I2C0>;
944 clocks = <&ccu CLK_BUS_I2C1>;
945 resets = <&ccu RST_BUS_I2C1>;
957 clocks = <&ccu CLK_BUS_I2C2>;
958 resets = <&ccu RST_BUS_I2C2>;
970 clocks = <&ccu CLK_BUS_I2C3>;
971 resets = <&ccu RST_BUS_I2C3>;
983 clocks = <&ccu CLK_BUS_CAN>;
984 resets = <&ccu RST_BUS_CAN>;
992 clocks = <&ccu CLK_BUS_I2C4>;
993 resets = <&ccu RST_BUS_I2C4>;
1018 clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
1020 resets = <&ccu RST_BUS_GPU>;
1025 syscon = <&ccu>;
1029 resets = <&ccu RST_BUS_GMAC>;
1031 clocks = <&ccu CLK_BUS_GMAC>;
1045 clocks = <&ccu 155>;
1055 clocks = <&ccu CLK_BUS_TCON_TOP>,
1056 <&ccu CLK_TCON_TV0>,
1057 <&ccu CLK_TVE0>,
1058 <&ccu CLK_TCON_TV1>,
1059 <&ccu CLK_TVE1>,
1060 <&ccu CLK_DSI_DPHY>;
1070 resets = <&ccu RST_BUS_TCON_TOP>;
1174 clocks = <&ccu CLK_BUS_TCON_TV0>, <&tcon_top CLK_TCON_TOP_TV0>;
1176 resets = <&ccu RST_BUS_TCON_TV0>;
1217 clocks = <&ccu CLK_BUS_TCON_TV1>, <&tcon_top CLK_TCON_TOP_TV1>;
1219 resets = <&ccu RST_BUS_TCON_TV1>;
1273 clocks = <&ccu CLK_BUS_HDMI0>, <&ccu CLK_HDMI_SLOW>,
1274 <&ccu CLK_HDMI>, <&rtc CLK_OSC32K>;
1276 resets = <&ccu RST_BUS_HDMI1>;
1303 clocks = <&ccu CLK_BUS_HDMI1>, <&ccu CLK_HDMI_SLOW>,
1304 <&ccu CLK_PLL_VIDEO0>, <&ccu CLK_PLL_VIDEO1>;
1306 resets = <&ccu RST_BUS_HDMI0>;