1 // SPDX-License-Identifier: GPL-2.0-only
34 	 * DW APB GPIO blocks (mainly for debouncing)  in hsdk_enable_gpio_intc_wire()
36 	 *         ---------------------  in hsdk_enable_gpio_intc_wire()
37 	 *        |  snps,archs-intc  |  in hsdk_enable_gpio_intc_wire()
38 	 *        ---------------------  in hsdk_enable_gpio_intc_wire()
40 	 *        ----------------------  in hsdk_enable_gpio_intc_wire()
41 	 *        | snps,archs-idu-intc |  in hsdk_enable_gpio_intc_wire()
42 	 *        ----------------------  in hsdk_enable_gpio_intc_wire()
46 	 * -------------------  in hsdk_enable_gpio_intc_wire()
47 	 * | snps,dw-apb-intc |  in hsdk_enable_gpio_intc_wire()
48 	 * -------------------  in hsdk_enable_gpio_intc_wire()
52 	 * Current implementation of "irq-dw-apb-ictl" driver doesn't work well  in hsdk_enable_gpio_intc_wire()
54 	 * not yet instantiated. See discussion here -  in hsdk_enable_gpio_intc_wire()
58 	 * DT hardware topology - connect intc directly to cpu intc  in hsdk_enable_gpio_intc_wire()
66 	 * - GPIO[0] - Bluetooth interrupt of RS9113 module  in hsdk_enable_gpio_intc_wire()
67 	 * - GPIO[2] - HAPS interrupt (on HapsTrak 3 connector)  in hsdk_enable_gpio_intc_wire()
68 	 * - GPIO[3] - Audio codec (MAX9880A) interrupt  in hsdk_enable_gpio_intc_wire()
69 	 * - GPIO[8-23] - Available on Arduino and PMOD_x headers  in hsdk_enable_gpio_intc_wire()
71 	 * use-case so we only enable lines 0, 2 and 3.  in hsdk_enable_gpio_intc_wire()
73 …* [1] https://github.com/foss-for-synopsys-dwc-arc-processors/ARC-Development-Systems-Forum/wiki/d…  in hsdk_enable_gpio_intc_wire()
99 	prop = fdt_getprop(fdt, node, "dma-coherent", &ret);  in hsdk_tweak_node_coherency()
100 	if (!prop && ret != -FDT_ERR_NOTFOUND)  in hsdk_tweak_node_coherency()
103 	dt_coh_set = ret != -FDT_ERR_NOTFOUND;  in hsdk_tweak_node_coherency()
106 	/* need to remove "dma-coherent" property */  in hsdk_tweak_node_coherency()
108 		ret = fdt_delprop(fdt, node, "dma-coherent");  in hsdk_tweak_node_coherency()
110 	/* need to set "dma-coherent" property */  in hsdk_tweak_node_coherency()
112 		ret = fdt_setprop(fdt, node, "dma-coherent", NULL, 0);  in hsdk_tweak_node_coherency()
121 	return -EFAULT;  in hsdk_tweak_node_coherency()
142  * This is modified configuration of AXI bridge. Default settings
145  * AXI_M_m_SLV{0|1} - Slave Select register for master 'm'.
147  *  - 0  => no slave selected
148  *  - 1  => DDR controller port #1
149  *  - 2  => SRAM controller
150  *  - 3  => AXI tunnel
151  *  - 4  => EBI controller
152  *  - 5  => ROM controller
153  *  - 6  => AXI2APB bridge
154  *  - 7  => DDR controller port #2
155  *  - 8  => DDR controller port #3
156  *  - 9  => HS38x4 IOC
157  *  - 10 => HS38x4 DMI
158  * AXI_M_m_OFFSET{0|1} - Addr Offset register for master 'm'
166  * 2	AXI Tunnel	0x88888888	0x88888888	0xFEDCBA98	0x76543210
167  * 3	HDMI-VIDEO	0x77777777	0x77777777	0xFEDCBA98	0x76543210
168  * 4	HDMI-ADUIO	0x77777777	0x77777777	0xFEDCBA98	0x76543210
169  * 5	USB-HOST	0x77777777	0x77999999	0xFEDCBA98	0x76DCBA98
173  * 9	DMAC (port #1)	0x77777777	0x77777777	0xFEDCBA98	0x76543210
174  * 10	DMAC (port #2)	0x77777777	0x77777777	0xFEDCBA98	0x76543210
198 	if (hsdk_tweak_node_coherency("/soc/dmac@80000", coherent))  in hsdk_init_memory_bridge_axi_dmac()
227 	 * M_HS_CORE has one unique register - BOOT.  in hsdk_init_memory_bridge()
310 	 * Switch SDIO external ciu clock divider from default div-by-8 to  in hsdk_init_early()
311 	 * minimum possible div-by-2.  in hsdk_init_early()