39  * - In ARCv2 ABI, the return value is in r0 for 32-bit results and (r1,r0)
73 	/* Remaining arguments, to be passed on the stack per 32-bit ABI */
80 	/* Read-only frame pointer to access the eBPF stack. 32-bit only. */
103 	INSN_len_imm = 4	/* Length of an extra 32-bit immediate. */
248 /* 32-bit load. */
270 /* 32-bit store. */
370  * mpy is the signed 32-bit multiplication with the lower 32-bit
384  * mpydu is the unsigned 32-bit multiplication with the lower 32-bit of
385  * the product in register "a" and the higher 32-bit in register "a+1".
936  * 32-bits of register pairs after "cmp"ing their upper parts. If the
1125  * "tst" on the low 32-bit of register pairs. If that "tst" is not
1126  * zero, then we don't need to test the upper 32-bits lest it sets
1322 		else if (sign_ext == 32 && rd != rs)  in mov_r32()
1346 		/* First handle the low 32-bit part. */  in mov_r64()
1350 		if (sign_ext == 8 || sign_ext == 16 || sign_ext == 32) {  in mov_r64()
1367 	/* BPF_REG_FP is mapped to 32-bit "fp" register. */  in mov_r64()
1374 /* Sign extend the 32-bit immediate into 64-bit register pair. */
1381 	/* BPF_REG_FP is mapped to 32-bit "fp" register. */  in mov_r64_i32()
1482  * For {8,16,32}-bit stores:
1526 	/* BPF_REG_FP is mapped to 32-bit "fp" register. */  in push_r64()
1549 		/* Use LD.X only if the data size is less than 32-bit. */  in load_r()
1915  * if (n <= 32)
1916  *   to_hi = lo >> (32-n)   # (32-n) is the negate of "n" in a 5-bit width.
1921  *   hi = lo << (n-32)
1942  * For 32<=n<64, "n-32" and "n&31" are the same. Therefore, "B << n" and
1943  * "B << (n-32)" yield the same results. e.g. the results of "B << 35" and
1972  * if (n < 32)
1973  *   to_hi = B_lo >> 32-n          # extract upper n bits
1978  *   hi = lo << n-32
1992 		len  = arc_lsri_r(buf, t0, B_lo, 32 - n);  in lsh_r64_i32()
1997 		len  = arc_asli_r(buf, B_hi, B_lo, n - 32);  in lsh_r64_i32()
2021  * if (n <= 32)
2022  *   to_lo = hi << (32-n)
2027  *   lo = hi >> (n-32)
2067  * if (n < 32)
2068  *   to_lo = B_lo << 32-n     # extract lower n bits, right-padded with 32-n 0s
2073  *   lo = hi >> n-32
2087 		len  = arc_asli_r(buf, t0, B_hi, 32 - n);  in rsh_r64_i32()
2092 		len  = arc_lsri_r(buf, B_lo, B_hi, n - 32);  in rsh_r64_i32()
2116  * if (n <= 32)
2117  *   to_lo = hi << (32-n)
2123  *   lo = hi s>> (n-32)
2165  * if (n < 32)
2166  *   to_lo = lo << 32-n     # extract lower n bits, right-padded with 32-n 0s
2171  *   lo = hi s>> n-32
2185 		len  = arc_asli_r(buf, t0, B_hi, 32 - n);  in arsh_r64_i32()
2190 		len  = arc_asri_r(buf, B_lo, B_hi, n - 32);  in arsh_r64_i32()
2217 		case 32:  in gen_swap()
2249 		case 32:  in gen_swap()
2471 		/* "usage" is 32-bit, each bit indicating an ARC register. */  in arc_epilogue()
2506  * 0x100C: cmp  r2, r0     # the lower 32 bits are evaluated
2756 		 * 3rd instruction. See comments of "gen_j{set,_eq}_64()".  in check_jmp_64()
2791  * a role here either, because the lower 32 bits are not processed yet.
2795  * MSB of the lower 32 bits does not reflect a sign in the whole 64-bit
2880  * for 32-bit jumps.
2926  * The JITed code for 32-bit (conditional) branches:
2951 		pr_err("32-bit jump condition is not known.");  in gen_jmp_32()