Lines Matching +full:- +full:state
1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
19 * findings in *state
21 void __kprobes disasm_instr(unsigned long addr, struct disasm_state *state, in disasm_instr() argument
32 memset(state, 0, sizeof(struct disasm_state)); in disasm_instr()
48 state->major_opcode = (word1 >> 11) & 0x1F; in disasm_instr()
51 if (state->major_opcode < 0x0B) { in disasm_instr()
54 state->instr_len = 4; in disasm_instr()
56 state->words[0] = (word1 << 16) | word0; in disasm_instr()
58 state->instr_len = 2; in disasm_instr()
59 state->words[0] = word1; in disasm_instr()
63 word1 = *((uint16_t *)(addr + state->instr_len)); in disasm_instr()
64 word0 = *((uint16_t *)(addr + state->instr_len + 2)); in disasm_instr()
65 state->words[1] = (word1 << 16) | word0; in disasm_instr()
67 switch (state->major_opcode) { in disasm_instr()
69 state->is_branch = 1; in disasm_instr()
72 fieldA = (IS_BIT(state->words[0], 16)) ? in disasm_instr()
73 FIELD_s25(state->words[0]) : in disasm_instr()
74 FIELD_s21(state->words[0]); in disasm_instr()
76 state->delay_slot = IS_BIT(state->words[0], 5); in disasm_instr()
77 state->target = fieldA + (addr & ~0x3); in disasm_instr()
78 state->flow = direct_jump; in disasm_instr()
82 if (IS_BIT(state->words[0], 16)) { in disasm_instr()
85 fieldA = (IS_BIT(state->words[0], 17)) ? in disasm_instr()
86 (FIELD_s25(state->words[0]) & ~0x3) : in disasm_instr()
87 FIELD_s21(state->words[0]); in disasm_instr()
89 state->flow = direct_call; in disasm_instr()
92 fieldA = FIELD_s9(state->words[0]) & ~0x3; in disasm_instr()
93 state->flow = direct_jump; in disasm_instr()
96 state->delay_slot = IS_BIT(state->words[0], 5); in disasm_instr()
97 state->target = fieldA + (addr & ~0x3); in disasm_instr()
98 state->is_branch = 1; in disasm_instr()
102 state->write = 0; in disasm_instr()
103 state->di = BITS(state->words[0], 11, 11); in disasm_instr()
104 if (state->di) in disasm_instr()
106 state->x = BITS(state->words[0], 6, 6); in disasm_instr()
107 state->zz = BITS(state->words[0], 7, 8); in disasm_instr()
108 state->aa = BITS(state->words[0], 9, 10); in disasm_instr()
109 state->wb_reg = FIELD_B(state->words[0]); in disasm_instr()
110 if (state->wb_reg == REG_LIMM) { in disasm_instr()
111 state->instr_len += 4; in disasm_instr()
112 state->aa = 0; in disasm_instr()
113 state->src1 = state->words[1]; in disasm_instr()
115 state->src1 = get_reg(state->wb_reg, regs, cregs); in disasm_instr()
117 state->src2 = FIELD_s9(state->words[0]); in disasm_instr()
118 state->dest = FIELD_A(state->words[0]); in disasm_instr()
119 state->pref = (state->dest == REG_LIMM); in disasm_instr()
123 state->write = 1; in disasm_instr()
124 state->di = BITS(state->words[0], 5, 5); in disasm_instr()
125 if (state->di) in disasm_instr()
127 state->aa = BITS(state->words[0], 3, 4); in disasm_instr()
128 state->zz = BITS(state->words[0], 1, 2); in disasm_instr()
129 state->src1 = FIELD_C(state->words[0]); in disasm_instr()
130 if (state->src1 == REG_LIMM) { in disasm_instr()
131 state->instr_len += 4; in disasm_instr()
132 state->src1 = state->words[1]; in disasm_instr()
134 state->src1 = get_reg(state->src1, regs, cregs); in disasm_instr()
136 state->wb_reg = FIELD_B(state->words[0]); in disasm_instr()
137 if (state->wb_reg == REG_LIMM) { in disasm_instr()
138 state->aa = 0; in disasm_instr()
139 state->instr_len += 4; in disasm_instr()
140 state->src2 = state->words[1]; in disasm_instr()
142 state->src2 = get_reg(state->wb_reg, regs, cregs); in disasm_instr()
144 state->src3 = FIELD_s9(state->words[0]); in disasm_instr()
148 subopcode = MINOR_OPCODE(state->words[0]); in disasm_instr()
157 state->delay_slot = 1; in disasm_instr()
163 op_format = BITS(state->words[0], 22, 23); in disasm_instr()
165 (!IS_BIT(state->words[0], 5)))) { in disasm_instr()
166 fieldC = FIELD_C(state->words[0]); in disasm_instr()
169 fieldC = state->words[1]; in disasm_instr()
170 state->instr_len += 4; in disasm_instr()
175 && (IS_BIT(state->words[0], 5)))) { in disasm_instr()
176 fieldC = FIELD_C(state->words[0]); in disasm_instr()
179 fieldC = FIELD_s12(state->words[0]); in disasm_instr()
183 state->target = fieldC; in disasm_instr()
184 state->flow = is_linked ? in disasm_instr()
187 state->target = get_reg(fieldC, regs, cregs); in disasm_instr()
188 state->flow = is_linked ? in disasm_instr()
191 state->is_branch = 1; in disasm_instr()
195 if (BITS(state->words[0], 22, 23) == 3) { in disasm_instr()
197 fieldC = FIELD_C(state->words[0]); in disasm_instr()
201 state->is_branch = 1; in disasm_instr()
202 state->flow = direct_jump; in disasm_instr()
203 state->target = fieldC; in disasm_instr()
210 state->di = BITS(state->words[0], 15, 15); in disasm_instr()
211 if (state->di) in disasm_instr()
213 state->x = BITS(state->words[0], 16, 16); in disasm_instr()
214 state->zz = BITS(state->words[0], 17, 18); in disasm_instr()
215 state->aa = BITS(state->words[0], 22, 23); in disasm_instr()
216 state->wb_reg = FIELD_B(state->words[0]); in disasm_instr()
217 if (state->wb_reg == REG_LIMM) { in disasm_instr()
218 state->instr_len += 4; in disasm_instr()
219 state->src1 = state->words[1]; in disasm_instr()
221 state->src1 = get_reg(state->wb_reg, regs, in disasm_instr()
224 state->src2 = FIELD_C(state->words[0]); in disasm_instr()
225 if (state->src2 == REG_LIMM) { in disasm_instr()
226 state->instr_len += 4; in disasm_instr()
227 state->src2 = state->words[1]; in disasm_instr()
229 state->src2 = get_reg(state->src2, regs, in disasm_instr()
232 state->dest = FIELD_A(state->words[0]); in disasm_instr()
233 if (state->dest == REG_LIMM) in disasm_instr()
234 state->pref = 1; in disasm_instr()
240 switch (BITS(state->words[0], 22, 23)) { in disasm_instr()
242 if (FIELD_C(state->words[0]) == REG_LIMM) in disasm_instr()
243 state->instr_len += 4; in disasm_instr()
250 if ((!IS_BIT(state->words[0], 5)) && in disasm_instr()
251 (FIELD_C(state->words[0]) == REG_LIMM)) in disasm_instr()
252 state->instr_len += 4; in disasm_instr()
261 switch (BITS(state->words[0], 22, 23)) { in disasm_instr()
263 if ((FIELD_B(state->words[0]) == REG_LIMM) || in disasm_instr()
264 (FIELD_C(state->words[0]) == REG_LIMM)) in disasm_instr()
265 state->instr_len += 4; in disasm_instr()
272 if ((!IS_BIT(state->words[0], 5)) && in disasm_instr()
273 ((FIELD_B(state->words[0]) == REG_LIMM) || in disasm_instr()
274 (FIELD_C(state->words[0]) == REG_LIMM))) in disasm_instr()
275 state->instr_len += 4; in disasm_instr()
284 state->zz = BITS(state->words[0], 3, 4); in disasm_instr()
285 state->src1 = get_reg(FIELD_S_B(state->words[0]), regs, cregs); in disasm_instr()
286 state->src2 = get_reg(FIELD_S_C(state->words[0]), regs, cregs); in disasm_instr()
287 state->dest = FIELD_S_A(state->words[0]); in disasm_instr()
292 if ((BITS(state->words[0], 3, 4) < 3) && in disasm_instr()
293 (FIELD_S_H(state->words[0]) == REG_LIMM)) in disasm_instr()
294 state->instr_len += 4; in disasm_instr()
298 subopcode = BITS(state->words[0], 5, 7); in disasm_instr()
304 state->target = get_reg(FIELD_S_B(state->words[0]), in disasm_instr()
306 state->delay_slot = subopcode & 1; in disasm_instr()
307 state->flow = (subopcode >= 2) ? in disasm_instr()
311 switch (BITS(state->words[0], 8, 10)) { in disasm_instr()
316 state->delay_slot = (subopcode == 7); in disasm_instr()
317 state->flow = indirect_jump; in disasm_instr()
318 state->target = get_reg(31, regs, cregs); in disasm_instr()
328 state->src1 = get_reg(FIELD_S_B(state->words[0]), regs, cregs); in disasm_instr()
329 state->src2 = FIELD_S_u7(state->words[0]); in disasm_instr()
330 state->dest = FIELD_S_C(state->words[0]); in disasm_instr()
337 state->zz = 1; in disasm_instr()
341 state->x = 1; in disasm_instr()
345 state->zz = 2; in disasm_instr()
346 state->src1 = get_reg(FIELD_S_B(state->words[0]), regs, cregs); in disasm_instr()
347 state->src2 = FIELD_S_u6(state->words[0]); in disasm_instr()
348 state->dest = FIELD_S_C(state->words[0]); in disasm_instr()
352 state->write = 1; in disasm_instr()
353 state->src1 = get_reg(FIELD_S_C(state->words[0]), regs, cregs); in disasm_instr()
354 state->src2 = get_reg(FIELD_S_B(state->words[0]), regs, cregs); in disasm_instr()
355 state->src3 = FIELD_S_u7(state->words[0]); in disasm_instr()
359 state->write = 1; in disasm_instr()
360 state->zz = 2; in disasm_instr()
361 state->src1 = get_reg(FIELD_S_C(state->words[0]), regs, cregs); in disasm_instr()
362 state->src2 = get_reg(FIELD_S_B(state->words[0]), regs, cregs); in disasm_instr()
363 state->src3 = FIELD_S_u6(state->words[0]); in disasm_instr()
370 state->write = BITS(state->words[0], 6, 6); in disasm_instr()
371 state->zz = BITS(state->words[0], 5, 5); in disasm_instr()
372 if (state->zz) in disasm_instr()
374 if (!state->write) { in disasm_instr()
375 state->src1 = get_reg(28, regs, cregs); in disasm_instr()
376 state->src2 = FIELD_S_u7(state->words[0]); in disasm_instr()
377 state->dest = FIELD_S_B(state->words[0]); in disasm_instr()
379 state->src1 = get_reg(FIELD_S_B(state->words[0]), regs, in disasm_instr()
381 state->src2 = get_reg(28, regs, cregs); in disasm_instr()
382 state->src3 = FIELD_S_u7(state->words[0]); in disasm_instr()
388 state->zz = BITS(state->words[0], 9, 10); in disasm_instr()
389 state->src1 = get_reg(26, regs, cregs); in disasm_instr()
390 state->src2 = state->zz ? FIELD_S_s10(state->words[0]) : in disasm_instr()
391 FIELD_S_s11(state->words[0]); in disasm_instr()
392 state->dest = 0; in disasm_instr()
396 state->src1 = regs->ret & ~3; in disasm_instr()
397 state->src2 = FIELD_S_u10(state->words[0]); in disasm_instr()
398 state->dest = FIELD_S_B(state->words[0]); in disasm_instr()
402 state->target = FIELD_S_s8(state->words[0]) + (addr & ~0x03); in disasm_instr()
403 state->flow = direct_jump; in disasm_instr()
404 state->is_branch = 1; in disasm_instr()
408 fieldA = (BITS(state->words[0], 9, 10) == 3) ? in disasm_instr()
409 FIELD_S_s7(state->words[0]) : in disasm_instr()
410 FIELD_S_s10(state->words[0]); in disasm_instr()
411 state->target = fieldA + (addr & ~0x03); in disasm_instr()
412 state->flow = direct_jump; in disasm_instr()
413 state->is_branch = 1; in disasm_instr()
417 state->target = FIELD_S_s13(state->words[0]) + (addr & ~0x03); in disasm_instr()
418 state->flow = direct_call; in disasm_instr()
419 state->is_branch = 1; in disasm_instr()
426 if (bytes_not_copied <= (8 - state->instr_len)) in disasm_instr()
429 fault: state->fault = 1; in disasm_instr()
439 p = ®s->r0; in get_reg()
440 return p[-reg]; in get_reg()
444 p = ®s->r0; in get_reg()
449 return regs->r12; in get_reg()
451 return regs->r30; in get_reg()
454 return regs->r58; in get_reg()
456 return regs->r59; in get_reg()
460 p = &cregs->r13; in get_reg()
461 return p[13 - reg]; in get_reg()
465 return regs->r26; in get_reg()
467 return regs->fp; in get_reg()
469 return regs->sp; in get_reg()
471 return regs->blink; in get_reg()
484 p = ®s->r0; in set_reg()
485 p[-reg] = val; in set_reg()
489 p = &cregs->r13; in set_reg()
490 p[13 - reg] = val; in set_reg()
494 regs->r26 = val; in set_reg()
497 regs->fp = val; in set_reg()
500 regs->sp = val; in set_reg()
503 regs->blink = val; in set_reg()
511 p = ®s->r0; in set_reg()
515 regs->r12 = val; in set_reg()
519 p = &cregs->r13; in set_reg()
520 p[13 - reg] = val; in set_reg()
524 regs->r26 = val; in set_reg()
527 regs->fp = val; in set_reg()
530 regs->sp = val; in set_reg()
533 regs->r30 = val; in set_reg()
536 regs->blink = val; in set_reg()
540 regs->r58 = val; in set_reg()
543 regs->r59 = val; in set_reg()
557 * -@tgt_if_br is set to branch target.
558 * -If branch has delay slot, @next_pc updated with actual next PC.
585 /* Zero Overhead Loop - end of the loop */ in disasm_next_pc()
586 if (!(regs->status32 & STATUS32_L) && (*next_pc == regs->lp_end) in disasm_next_pc()
587 && (regs->lp_count > 1)) { in disasm_next_pc()
588 *next_pc = regs->lp_start; in disasm_next_pc()