Lines Matching +full:io +full:- +full:width
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)
10 compatible = "simple-bus";
11 #address-cells = <1>;
12 #size-cells = <1>;
14 interrupt-parent = <&mb_intc>;
18 compatible = "fixed-clock";
19 clock-frequency = <50000000>;
20 #clock-cells = <0>;
24 compatible = "fixed-clock";
25 clock-frequency = <50000000>;
26 #clock-cells = <0>;
30 #clock-cells = <0>;
31 compatible = "fixed-clock";
32 clock-frequency = <25175000>;
37 #interrupt-cells = <1>;
41 interrupt-names = "macirq";
42 phy-mode = "rgmii";
43 snps,phy-addr = < 0 >; // VDK model phy address is 0
46 clock-names = "stmmaceth";
50 compatible = "generic-ehci";
56 compatible = "snps,dw-apb-uart";
58 clock-frequency = <2403200>;
61 reg-shift = <2>;
62 reg-io-width = <4>;
66 compatible = "snps,dw-apb-uart";
68 clock-frequency = <2403200>;
71 reg-shift = <2>;
72 reg-io-width = <4>;
76 compatible = "snps,dw-apb-uart";
78 clock-frequency = <2403200>;
81 reg-shift = <2>;
82 reg-io-width = <4>;
90 clock-names = "pxlclk";
98 interrupt-names = "arc_ps2_irq";
102 compatible = "snps,dw-mshc";
104 fifo-depth = <1024>;
105 card-detect-delay = <200>;
107 clock-names = "biu", "ciu";
109 bus-width = <4>;
117 * it maps areas outside of MB's 0xez-0xfz.
120 compatible = "generic-uio";
122 reg-names = "ev_gsa", "ev_ctrl", "ev_shared_mem", "ev_code_mem";
123 interrupt-parent = <&mb_intc>;