Lines Matching +full:parent +full:- +full:clock +full:- +full:frequency
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
5 /dts-v1/;
10 model = "snps,nsimosci_hs-smp";
12 #address-cells = <1>;
13 #size-cells = <1>;
14 interrupt-parent = <&core_intc>;
18 …n8 console=tty0 console=ttyS0,115200n8 consoleblan=0 debug video=640x480-24 print-fatal-signals=1";
26 compatible = "simple-bus";
27 #address-cells = <1>;
28 #size-cells = <1>;
30 /* child and parent address space 1:1 mapped */
34 #clock-cells = <0>;
35 compatible = "fixed-clock";
36 clock-frequency = <5000000>;
39 core_intc: core-interrupt-controller {
40 compatible = "snps,archs-intc";
41 interrupt-controller;
42 #interrupt-cells = <1>;
45 idu_intc: idu-interrupt-controller {
46 compatible = "snps,archs-idu-intc";
47 interrupt-controller;
48 interrupt-parent = <&core_intc>;
49 #interrupt-cells = <1>;
55 interrupt-parent = <&idu_intc>;
57 clock-frequency = <3686400>;
59 reg-shift = <2>;
60 reg-io-width = <4>;
61 no-loopback-test = <1>;
65 #clock-cells = <0>;
66 compatible = "fixed-clock";
67 clock-frequency = <25175000>;
74 clock-names = "pxlclk";
81 interrupt-parent = <&idu_intc>;
82 interrupt-names = "arc_ps2_irq";
86 compatible = "ezchip,nps-mgt-enet";
88 interrupt-parent = <&idu_intc>;
93 compatible = "snps,archs-pct";
94 #interrupt-cells = <1>;