Lines Matching +full:fixed +full:- +full:mmio +full:- +full:clock
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2016-2014 Synopsys, Inc. (www.synopsys.com)
5 /dts-v1/;
12 #address-cells = <2>;
13 #size-cells = <2>;
14 interrupt-parent = <&core_intc>;
24 … "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 debug print-fatal-signals=1";
32 compatible = "simple-bus";
33 #address-cells = <1>;
34 #size-cells = <1>;
41 #clock-cells = <0>;
42 compatible = "fixed-clock";
43 clock-frequency = <50000000>;
46 core_intc: interrupt-controller {
47 compatible = "snps,archs-intc";
48 interrupt-controller;
49 #interrupt-cells = <1>;
56 clock-frequency = <50000000>;
58 reg-shift = <2>;
59 reg-io-width = <4>;
60 no-loopback-test = <1>;
64 compatible = "snps,archs-pct";
65 #interrupt-cells = <1>;
70 compatible = "virtio,mmio";
76 compatible = "virtio,mmio";
82 compatible = "virtio,mmio";
88 compatible = "virtio,mmio";
94 compatible = "virtio,mmio";