Lines Matching +full:1 +full:- +full:16
1 // SPDX-License-Identifier: GPL-2.0
47 mikasa_update_irq_hw(cached_irq_mask |= 1 << (d->irq - 16)); in mikasa_enable_irq()
53 mikasa_update_irq_hw(cached_irq_mask &= ~(1 << (d->irq - 16))); in mikasa_disable_irq()
70 pld = (((~inw(0x534) & 0x0000ffffUL) << 16) in mikasa_device_interrupt()
80 pld &= pld - 1; /* clear least bit set */ in mikasa_device_interrupt()
81 if (i < 16) { in mikasa_device_interrupt()
99 for (i = 16; i < 32; ++i) { in mikasa_init_irq()
116 * 1 Interrupt Line B from slot 0
119 * 4 Interrupt Line A from slot 1
120 * 5 Interrupt line B from slot 1
121 * 6 Interrupt Line C from slot 1
122 * 7 Interrupt Line D from slot 1
136 * 7 Intel PCI-EISA bridge chip
138 * 12 PCI on board slot 1
142 * This two layered interrupt approach means that we allocate IRQ 16 and
152 {16+12, 16+12, 16+12, 16+12, 16+12}, /* IdSel 17, SCSI */ in mikasa_map_irq()
153 { -1, -1, -1, -1, -1}, /* IdSel 18, PCEB */ in mikasa_map_irq()
154 { -1, -1, -1, -1, -1}, /* IdSel 19, ???? */ in mikasa_map_irq()
155 { -1, -1, -1, -1, -1}, /* IdSel 20, ???? */ in mikasa_map_irq()
156 { -1, -1, -1, -1, -1}, /* IdSel 21, ???? */ in mikasa_map_irq()
157 { 16+0, 16+0, 16+1, 16+2, 16+3}, /* IdSel 22, slot 0 */ in mikasa_map_irq()
158 { 16+4, 16+4, 16+5, 16+6, 16+7}, /* IdSel 23, slot 1 */ in mikasa_map_irq()
159 { 16+8, 16+8, 16+9, 16+10, 16+11}, /* IdSel 24, slot 2 */ in mikasa_map_irq()
170 .vector_name = "Mikasa-Primo",